Jingcheng Zhuang, Qingjin Du, Tad A. Kwasniewski. A 4GHz Low Complexity ADPLL-based Frequency Synthesizer in 90nm CMOS. In Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007, DoubleTree Hotel, San Jose, California, USA, September 16-19, 2007. pages 543-546, IEEE, 2007. [doi]
@inproceedings{ZhuangDK07,
title = {A 4GHz Low Complexity ADPLL-based Frequency Synthesizer in 90nm CMOS},
author = {Jingcheng Zhuang and Qingjin Du and Tad A. Kwasniewski},
year = {2007},
doi = {10.1109/CICC.2007.4405790},
url = {http://dx.doi.org/10.1109/CICC.2007.4405790},
researchr = {https://researchr.org/publication/ZhuangDK07},
cites = {0},
citedby = {0},
pages = {543-546},
booktitle = {Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007, DoubleTree Hotel, San Jose, California, USA, September 16-19, 2007},
publisher = {IEEE},
isbn = {978-1-4244-1623-3},
}