Jingcheng Zhuang, Robert Bogdan Staszewski. A low-power all-digital PLL architecture based on phase prediction. In 19th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2012, Seville, Spain, December 9-12, 2012. pages 797-800, IEEE, 2012. [doi]
@inproceedings{ZhuangS12, title = {A low-power all-digital PLL architecture based on phase prediction}, author = {Jingcheng Zhuang and Robert Bogdan Staszewski}, year = {2012}, doi = {10.1109/ICECS.2012.6463539}, url = {http://dx.doi.org/10.1109/ICECS.2012.6463539}, researchr = {https://researchr.org/publication/ZhuangS12}, cites = {0}, citedby = {0}, pages = {797-800}, booktitle = {19th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2012, Seville, Spain, December 9-12, 2012}, publisher = {IEEE}, isbn = {978-1-4673-1259-2}, }