A 1.5GHz all-digital frequency-locked loop with 1-bit ΔΣ frequency detection in 0.18μm CMOS

Huiying Zhuo, Yu Li, Woogeun Rhee, Zhihua Wang. A 1.5GHz all-digital frequency-locked loop with 1-bit ΔΣ frequency detection in 0.18μm CMOS. In Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2014, Hsinchu, Taiwan, April 28-30, 2014. pages 1-4, IEEE, 2014. [doi]

Authors

Huiying Zhuo

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Yu Li

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Woogeun Rhee

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Zhihua Wang

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