A 1.5GHz all-digital frequency-locked loop with 1-bit ΔΣ frequency detection in 0.18μm CMOS

Huiying Zhuo, Yu Li, Woogeun Rhee, Zhihua Wang. A 1.5GHz all-digital frequency-locked loop with 1-bit ΔΣ frequency detection in 0.18μm CMOS. In Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2014, Hsinchu, Taiwan, April 28-30, 2014. pages 1-4, IEEE, 2014. [doi]

@inproceedings{ZhuoLRW14,
  title = {A 1.5GHz all-digital frequency-locked loop with 1-bit ΔΣ frequency detection in 0.18μm CMOS},
  author = {Huiying Zhuo and Yu Li and Woogeun Rhee and Zhihua Wang},
  year = {2014},
  doi = {10.1109/VLSI-DAT.2014.6834880},
  url = {http://dx.doi.org/10.1109/VLSI-DAT.2014.6834880},
  researchr = {https://researchr.org/publication/ZhuoLRW14},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2014, Hsinchu, Taiwan, April 28-30, 2014},
  publisher = {IEEE},
}