A 1.8V 100mW 12-bits 80Msample/s two-step ADC in 0.18-μm CMOS

Amir Zjajo, Hendrik van der Ploeg, Maarten Vertregt. A 1.8V 100mW 12-bits 80Msample/s two-step ADC in 0.18-μm CMOS. In José E. Franca, Rudolf Koch, editors, ESSCIRC 2003 - 29th European Solid-State Circuits Conference, Estoril, Portugal, September 16-18, 2003. pages 241-244, IEEE, 2003. [doi]

@inproceedings{ZjajoPV03,
  title = {A 1.8V 100mW 12-bits 80Msample/s two-step ADC in 0.18-μm CMOS},
  author = {Amir Zjajo and Hendrik van der Ploeg and Maarten Vertregt},
  year = {2003},
  doi = {10.1109/ESSCIRC.2003.1257117},
  url = {https://doi.org/10.1109/ESSCIRC.2003.1257117},
  researchr = {https://researchr.org/publication/ZjajoPV03},
  cites = {0},
  citedby = {0},
  pages = {241-244},
  booktitle = {ESSCIRC 2003 - 29th European Solid-State Circuits Conference, Estoril, Portugal, September 16-18, 2003},
  editor = {José E. Franca and Rudolf Koch},
  publisher = {IEEE},
  isbn = {0-7803-7995-0},
}