A CPPLL hierarchical optimization methodology considering jitter, power and locking time

Jun Zou, Daniel Mueller, Helmut E. Graeb, Ulf Schlichtmann. A CPPLL hierarchical optimization methodology considering jitter, power and locking time. In Ellen Sentovich, editor, Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006. pages 19-24, ACM, 2006. [doi]

Abstract

Abstract is missing.