Abstract is missing.
- R3TOS-Based Integrated Modular Space Avionics for On-Board Real-Time Data ProcessingAdewale Adetomi, Godwin Enemali, Xabier Iturbe, Tughrul Arslan, Didier Keymeulen. 1-8 [doi]
- Dynamic Fault Tolerance Through Resource PoolingChristian M. Fuchs, Nadia M. Murillo, Aske Plaat, Erik van der Kouwe, Todor P. Stefanov. 9-16 [doi]
- Mitigation of Thermo-cycling effects in Flip-chip FPGA-based Space-borne Systems by Cyclic On-chip Task RelocationLev Kirischian, Valeri Kirischian, Dimple Sharma. 17-24 [doi]
- The intelligent Computer Aided Satellite Designer iCASD - Creating viable configurations for modular satellitesTimothee Buettner, Atanas Tanev, Lars Pfotzer, Arne Rönnau, Rüdiger Dillmann. 25-32 [doi]
- High Performance Space Computing with System-on-Chip Instrument Avionics for Space-based Next Generation Imaging Spectrometers (NGIS)Didier Keymeulen, Simon Shin, Jason Riddley, Matthew Klimesh, Aaron B. Kiely, Elliott Liggett, Peter Sullivan, Michael Bernas, Hamid Ghossemi, Greg Flesch, Michael Cheng, Sam Dolinar, David Dolman, Kevin Roth, Chris Holyoake, Ken Crocker, Adam Smith. 33-36 [doi]
- Electro-Magnetic Launchers on the Moon : A Feasibility StudyLuigi Mascolo, Adrian Stoica. 37-42 [doi]
- Fault-Tolerant Distributed Attitude and Orbit Control System for Space ApplicationsTanya Vladimirova, Muhammad Fayyaz. 43-50 [doi]
- Performance Analysis of SEE Mitigation Techniques on Zynq Ultrascale + Hardened Processing FabricsArturo Perez, Andrés Otero, Eduardo de la Torre. 51-58 [doi]
- Efficient Runtime Frame ECC Recomputation for Reliable Task Execution on Xilinx FPGAsGodwin Enemali, Adewale Adetomi, Tughrul Arslan. 59-65 [doi]
- Hardware and Software Task Scheduling for ARM-FPGA PlatformsAlexander Dörflinger, Mark Albers, Johannes Schlatow, Björn Fiethe, Harald Michalik, Phillip Keldenich, Sándor P. Fekete. 66-73 [doi]
- A Dynamically Reconfigurable Platform for High-Performance and Low-Power On-Board ProcessingAndrea Guerrieri, Sahand Kashani-Akhavan, Pasquale Lombardi, Bilel Belhadj, Paolo Ienne. 74-81 [doi]
- An Adaptive Telerobotics Control for Advanced ManufacturingBilal Nasser, Amir Rabani, Don Freiling, Christian Gan. 82-89 [doi]
- Modular And Self-Adaptable (MASA) strategy for building robotsVíctor Mayoral, Risto Kojcev, Alejandro Hernández, Irati Zamalloa, Asier Bilbao. 90-95 [doi]
- Delay Tolerant Network Routing as a Machine Learning Classification ProblemRachel Dudukovich, Christos Papachristou. 96-103 [doi]
- Pyramidal Neuron Architectures for AcceleratingDeep Neural Networks on FPGAHossam O. Ahmed, Maged Ghoneima, Mohamed Dessouky. 104-111 [doi]
- Approximate TMR for selective error mitigation in FPGAs based on testability analysisAntonio Sanchez-Clemente, Luis Entrena, Fernanda Lima Kastensmidt. 112-119 [doi]
- A Novel Error Rate Estimation Approach forUltraScale+ SRAM-based FPGAsLuca Sterpone, Sarah Azimi, Ludovica Bozzoli, Boyang Du, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Cesar Boatella Polo, David Merodio Codinachs. 120-126 [doi]
- Evaluation Methodology and Reconfiguration Tests on the New European NG-MEDIUM FPGAKonstantinos Maragos, Vasileios Leon, George Lentaris, Dimitrios Soudris, David Gonzalez-Arjona, Ruben Domingo, Antonio Pastor, David Merodio Codinachs, Isabelle Conway. 127-134 [doi]
- BRAVE NG-MEDIUM FPGA reconfiguration through SpaceWire: example use case and performance analysisKlemen Bravhar, Victor Martins, Lucana Santos, David Merodio Codinachs. 135-141 [doi]
- Design Abstraction for Autonomous Adaptive Hardware Systems on FPGAsSuhaib A. Fahmy. 142-147 [doi]
- Investigating the Use of Autoencoders for Gait-based Person RecognitionIsmahane Cheheb, Noor Al-Máadeed, Somaya Al-Máadeed, Ahmed Bouridane. 148-151 [doi]
- Competitive Coding Scheme based on 2D Log-Gabor filter for Palm Vein RecognitionLarbi Boubchir, Yassir Aberni, Boubaker Daachi. 152-155 [doi]
- A Novel Efficient Classwise Sparse and Collaborative Representation for Holistic Palmprint RecognitionImad Rida, Noor Al-Máadeed, Somaya Al-Máadeed. 156-161 [doi]
- Towards the design of smart video-surveillance systemAzeddine Beghdadi, Muhammad Asim, Noor Al-Máadeed, Muhammad Ali Qureshi. 162-167 [doi]
- Off-line Persian Signature Verification using Wavelet-based Fractal Dimension and One-class Gaussian ProcessSima Shariatmadari, Somaya Al-Máadeed, Younes Akbari, Imad Rida, Sima Emadi. 168-173 [doi]
- Towards a Secure Partial Reconfiguration of Xilinx FPGAs : Special Session PaperAdewale Adetomi, Godwin Enemali, Tughrul Arslan. 174-178 [doi]
- Simulation of 3D Printed Antenna System using Liquid Metal Antenna ElementsJonathan Thews, Alan O'Donnell, Alan J. Michaels. 179-183 [doi]
- A Low Complexity Decoding Algorithm for Spinal Codes with Efficiently Distributed SymbolsYingmeng Hu, Rongke Liu, Aryan Kaushik, Xiaoyan Shi, John S. Thompson. 184-191 [doi]
- A High-throughput Fine-grained Rate Adaptive Transmission Scheme for A LEO Satellite Communication SystemHongxiu Bian, Rongke Liu, Xiaoyan Shi, Jhon Thompson. 192-197 [doi]
- Adaptive genetic algorithm-based method for antenna location optimization in RF relative measurementZijie Wang, Rongke Liu, Weiqing Mu, Xiaoyan Shi, John S. Thompson. 198-203 [doi]
- Design and Analysis of Novel Interconnects with Network-on-Chip LVDS Transmitter for Low DelayJayshree, G. Seetharaman. 204-209 [doi]
- R3ToS based Partially Reconfigurable Data Flow Pipelined Network on chipPoornima Narayanasamy, Santhi Muthurathinam, Seetharaman Gopalakrishnan, Tughrul Arslan, Sithu D. Sudarsan. 210-213 [doi]
- Fault-Tolerant Mechanisms for Relocation-Aware Dynamic On-Chip Communication on FPGAsAdewale Adetomi, Godwin Enemali, Tughrul Arslan. 214-217 [doi]
- A 400 Mrad radiation-hardened optoelectronic embedded system with a silver-halide holographic memoryTakumi Fujimori, Minoru Watanabe. 218-224 [doi]
- Self-healing strategy for transient fault cell reutilization of embryonic array circuitZhai Zhang, Yao Qiu, Xiaoliang Yuan, Rui Yao, Youren Wang. 225-232 [doi]
- k-mer Counting with FPGAs and HMC In-Memory OperationsRick Wertenbroek, Yann Thoma. 233-240 [doi]
- Efficient Configuration for a Scalable Spiking Neural Network Platform by means of a Synchronous Address Event Representation busMireya Zapata, Janio Jadan, Jordi Madrenas. 241-248 [doi]
- HW-based Architecture for Runtime Verification of Embedded Software on SoPC systemsDimitry Solet, Jean-Luc Béchennec, Mikaël Briday. 249-256 [doi]
- Fast Reconfigurable Hash Functions for Network Flow Hashing in FPGAsDavid Grochol, Lukás Sekanina. 257-263 [doi]
- Design of Quality-Configurable Approximate Multipliers Suitable for Dynamic EnvironmentVojtech Mrazek, Zdenek Vasícek, Lukás Sekanina. 264-271 [doi]
- Pruning Self-Organizing Maps for Cellular Hardware ArchitecturesAndres Upegui, Bernard Girau, Nicolas Rougier, Fabien Vannel, Benoit Miramond. 272-279 [doi]
- RR4DSN: Reconfigurable Receiver for Deepwater Sensor NodesAliyu Dala, Adewale Adetomi, Godwin Enemali, Tughrul Arslan. 280-284 [doi]
- Sensors, SLAM and Long-term Autonomy: A ReviewMubariz Zaffar, Shoaib Ehsan, Rustam Stolkin, Klaus D. McDonald-Maier. 285-290 [doi]
- MAT-CNN-SOPC: Motionless Analysis of Traffic Using Convolutional Neural Networks on System-On-a-Programmable-ChipSomdip Dey, Grigorios Kalliatakis, Sangeet Saha, Amit Kumar Singh, Shoaib Ehsan, Klaus D. McDonald-Maier. 291-298 [doi]
- Real-Time Application Processing for FPGA-Based Resilient Embedded Systems in Harsh EnvironmentsSangeet Saha, Shoaib Ehsan, Adrian Stoica, Rustam Stolkin, Klaus D. McDonald-Maier. 299-304 [doi]
- Weather Classification: A new multi-class dataset, data augmentation approach and comprehensive evaluations of Convolutional Neural NetworksJose Carlos Villarreal Guerra, Zeba Khanam, Shoaib Ehsan, Rustam Stolkin, Klaus D. McDonald-Maier. 305-310 [doi]
- EvoFIT composite face construction via practitioner interviewing and a witness-administered protocolAlexander J. Martin, Peter J. B. Hancock, Charlie D. Frowd, Priscilla Heard, Emma Gaskin, Claire Ford, Thomas Hewett. 311-316 [doi]
- Security and Complexity Bounds of SUC-Based Physical IdentitySaleh Mulhem, Randa Zarrouk, Wael Adi. 317-322 [doi]
- On Quaternary 1-of-4 ID Generator CircuitsJulian Murphy, Gareth Howells, Klaus D. McDonald-Maier. 323-326 [doi]
- Clone-Resistant Joint-Identity Technique for Securing Fleet Management SystemsEmad Hamadaqa, Saleh Mulhem, Ayoub Mars, Wael Adi. 327-332 [doi]
- New Concept for Physically-Secured E-Coins CirculationsAyoub Mars, Wael Adi. 333-338 [doi]