Abstract is missing.
- Timing Errors in STA-based Gate-Level SimulationStavros Simoglou, Christos P. Sotiriou, Nikolaos Blias. 1-2 [doi]
- A Frontend using Traditional EDA Tools for the Pulsar QDI Design FlowMarcos L. L. Sartori, Matheus T. Moreira, Ney Laert Vilar Calazans. 3-10 [doi]
- Cyclone: A Static Timing and Power Engine for Asynchronous CircuitsWenmian Hua, Yi-Shan Lu, Keshav Pingali, Rajit Manohar. 11-19 [doi]
- Recursive Formulations for N Input Asynchronous First Come First Served ArbitersLindsay Kleeman. 20-27 [doi]
- Optimization and Comparison of SynchronizersJustin Reiher, Mark R. Greenstreet. 28-35 [doi]
- PALS: Plesiochronous and Locally Synchronous SystemsJohannes Bund, Matthias Függer, Christoph Lenzen, Moti Medina, Will Rosenbaum. 36-43 [doi]
- Timing Domain Crossing using Muller PipelinesFlorian Huemer, Andreas Steininger. 44-53 [doi]
- Formal Verification of Flow Equivalence in Desynchronized DesignsJennifer Paykin, Brian Huffman, Daniel M. Zimmerman, Peter A. Beerel. 54-62 [doi]
- Handshake Verification in WORKCRAFTVictor Khomenko, Danil Sokolov, Alex Yakovlev, David Lloyd. 63-64 [doi]
- Reducing Energy Consumption and Decentralizing Computing through Heat RedistributionLincoln S. Stevens, Mackenzie J. Wibbels, Valerie A. Wilkinson, Kenneth S. Stevens. 65-66 [doi]
- Chronos Link: A QDI Interconnect for Modern SoCsMatheus Trevisan Moreira, Stefano Giaconi. 67-68 [doi]
- A Self-Timed Ring based PUFGrégoire Gimenez, Abdelkarim Cherkaoui, Laurent Fesquet. 69-77 [doi]
- Radiation Hardened Click Controllers for Soft Error Resilient Asynchronous ArchitecturesFelipe A. Kuentzer, Moisés Herrera, Oliver Schrape, Peter A. Beerel, Milos Krstic. 78-85 [doi]
- Test Oriented Design and Layout Generation of an Asynchronous Controller for the Blade TemplateFelipe A. Kuentzer, Leonardo Rezende Juracy, Matheus T. Moreira, Alexandre M. Amory. 86-93 [doi]
- Shared-Staticizer for Area-Efficient Asynchronous CircuitsSamira Ataei, Rajit Manohar. 94-101 [doi]
- Coarse Grained versus Fine Grained Architectures for Asynchronous Reconfigurable DevicesTomohiro Yoneda, Masashi Imai. 102-110 [doi]