Large array-based circuits in ULV SoCs: design and statistical assessment of SRAMs and CMOS imagers

Thomas Haine. Large array-based circuits in ULV SoCs: design and statistical assessment of SRAMs and CMOS imagers. PhD thesis, Catholic University of Louvain, Louvain-la-Neuve, Belgium, 2018. [doi]

Abstract

Abstract is missing.