Abstract is missing.
- Using Dependent Types to Port Type Systems to Low-Level LanguagesGeorge C. Necula. 1 [doi]
- Interprocedural Dataflow Analysis in the Presence of Large LibrariesAtanas Rountev, Scott Kagan, Thomas J. Marlowe. 2-16 [doi]
- Efficient Flow-Sensitive Interprocedural Data-Flow Analysis in the Presence of PointersTeck Bok Tok, Samuel Z. Guyer, Calvin Lin. 17-31 [doi]
- Path-Based Reuse Distance AnalysisChangpeng Fang, Steve Carr, Soner Önder, Zhenlin Wang. 32-46 [doi]
- Context-Sensitive Points-to Analysis: Is It Worth It?Ondřej Lhoták, Laurie J. Hendren. 47-64 [doi]
- Selective Runtime Memory Disambiguation in a Dynamic Binary TranslatorBolei Guo, Youfeng Wu, Cheng Wang, Matthew J. Bridges, Guilherme Ottoni, Neil Vachharajani, Jonathan Chang, David I. August. 65-79 [doi]
- Accurately Choosing Execution Runs for Software Fault LocalizationLiang Guo, Abhik Roychoudhury, Tao Wang. 80-95 [doi]
- Demonstration: On-Line Visualization and Analysis of Real-Time Systems with TuningForkDavid F. Bacon, Perry Cheng, Daniel Frampton, David Grove, Matthias Hauswirth, V. T. Rajan. 96-100 [doi]
- Data-Flow Analysis as Model Checking Within the jABCAnna-Lena Lamprecht, Tiziana Margaria, Bernhard Steffen. 101-104 [doi]
- The CGiS Compiler-A Tool DemonstrationPhilipp Lucas, Nicolas Fritz, Reinhard Wilhelm. 105-108 [doi]
- Loop Transformations in the Ahead-of-Time Optimization of Java BytecodeSimon Hammond, David Lacey. 109-123 [doi]
- Hybrid Optimizations: Which Optimization Algorithm to Use?John Cavazos, J. Eliot B. Moss, Michael F. P. O Boyle. 124-138 [doi]
- A Fresh Look at PRE as a Maximum Flow ProblemJingling Xue, Jens Knoop. 139-154 [doi]
- Performance Characterization of the 64-bit x86 Architecture from Compiler Optimizations PerspectiveJack Liu, Youfeng Wu. 155-169 [doi]
- Lightweight Lexical Closures for Legitimate Execution Stack AccessMasahiro Yasugi, Tasuku Hiraishi, Taiichi Yuasa. 170-184 [doi]
- Polyhedral Code Generation in the Real WorldNicolas Vasilache, Cédric Bastoul, Albert Cohen. 185-201 [doi]
- Iterative Collective Loop FusionThomas J. Ashby, Michael F. P. O Boyle. 202-216 [doi]
- Converting Intermediate Code to Assembly Code Using Declarative Machine DescriptionsJoão Dias, Norman Ramsey. 217-231 [doi]
- SARA: Combining Stack Allocation and Register AllocationV. Krishna Nandivada, Jens Palsberg. 232-246 [doi]
- Register Allocation for Programs in SSA-FormSebastian Hack, Daniel Grund, Gerhard Goos. 247-262 [doi]
- Enhanced Bitwidth-Aware Register AllocationRajkishore Barik, Vivek Sarkar. 263-276 [doi]