Abstract is missing.
- Chip multiprocessing and the cell broadband engineMichael Gschwind. 1-8 [doi]
- The potential of the cell processor for scientific computingSamuel Williams, John Shalf, Leonid Oliker, Shoaib Kamil, Parry Husbands, Katherine A. Yelick. 9-20 [doi]
- MPSoC ECG biochip: a multiprocessor system-on-chip for real-time human heart monitoring and analysisIyad Al Khatib, Davide Bertozzi, Francesco Poletti, Luca Benini, Axel Jantsch, Mohamed Bechara, Hasan Khalifeh, Mazen Hajjar, Rustam Nabiev, Sven Jonsson. 21-28 [doi]
- Dynamic thread assignment on heterogeneous multiprocessor architecturesMichela Becchi, Patrick Crowley. 29-40 [doi]
- Landing openMP on cyclops-64: an efficient mapping of openMP to a many-core system-on-a-chipJuan del Cuvillo, Weirong Zhu, Guang R. Gao. 41-50 [doi]
- Current and future research directions in embedded systems: a european perspectivePanagiotis Tsarchopoulos. 51-52 [doi]
- Morphogenesis as an amorphous computationArnab Bhattacharyya. 53-64 [doi]
- A nano-scale reconfigurable mesh with spin wavesMary Mehrnoosh Eshaghian-Wilner, Alexander Khitun, Shiva Navab, Kang L. Wang. 65-70 [doi]
- Implementing quantum genetic algorithms: a solution based on Grover s algorithmMihai Udrescu, Lucian Prodan, Mircea Vladutiu. 71-82 [doi]
- Tile size selection for low-power tile-based architecturesJohn Oliver, Ravishankar Rao, Michael Brown, Jennifer Mankin, Diana Franklin, Frederic T. Chong, Venkatesh Akella. 83-94 [doi]
- Profile-driven compression scheme for embedded systemsIsrael Waldman, Shlomit S. Pinter. 95-104 [doi]
- Energy-aware data prefetching for multi-speed disksSeung Woo Son, Mahmut T. Kandemir. 105-114 [doi]
- Empty space computes: the evolution of an unconventional supercomputerJonathan W. Mills, Matt Parker, Bryce Himebaugh, Craig Shue, Brian Kopecky, Chris Weilemann. 115-126 [doi]
- Dynamic parallelization and mapping of binary executables on hierarchical platformsEfe Yardimci, Michael Franz. 127-138 [doi]
- Instruction folding in a hardware-translation based java virtual machineHitoshi Oi. 139-146 [doi]
- On the decidability of phase ordering problem in optimizing compilationSid Ahmed Ali Touati, Denis Barthou. 147-156 [doi]
- Multi-compilation: capturing interactions among concurrently-executing applicationsOzcan Ozturk, Guangyu Chen, Mahmut T. Kandemir. 157-170 [doi]
- An opportunistic reconfiguration strategy for environmentally powered devicesIgino Folcarelli, Alex E. Susu, Ties Kluter, Giovanni De Micheli, Andrea Acquaviva. 171-176 [doi]
- Using managed communication channels in software componentsEmil A. Stoyanov, Markus Alexander Wischy, Dieter Roller. 177-186 [doi]
- A dependability perspective on emerging technologiesLucian Prodan, Mihai Udrescu, Mircea Vladutiu. 187-198 [doi]
- Self-replication for reliability: bio-inspired hardware and the embryonics projectGianluca Tempesti, Daniel Mange, Pierre-André Mudry, Joël Rossier, André Stauffer. 199-206 [doi]
- Dependability in an evolving worldAndrew M. Tyrrell. 207-220 [doi]
- On dependability of FPGA-based evolvable hardware systems that utilize virtual reconfigurable circuitsLukás Sekanina. 221-228 [doi]
- Memory efficient parallel matrix multiplication operation for irregular problemsManojkumar Krishnan, Jarek Nieplocha. 229-240 [doi]
- Database hash-join algorithms on multithreaded computer architecturesPhilip Garcia, Henry F. Korth. 241-252 [doi]
- Improving the memory behavior of vertical filtering in the discrete wavelet transformAsadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis. 253-260 [doi]
- Dynamic testing of legacy code resources on the gridLuigi Bitonti, Tamás Kiss, Gábor Terstyánszky, Thierry Delaitre, Stephen C. Winter, Péter Kacsuk. 261-268 [doi]
- Kilo-instruction processors, runahead and prefetchingTanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Mateo Valero. 269-278 [doi]
- Exploiting locality to ameliorate packet queue contention and serializationSailesh Kumar, John Maschmeyer, Patrick Crowley. 279-290 [doi]
- Speculative early register releaseJesús Alastruey, Teresa Monreal, Víctor Viñals, Mateo Valero. 291-302 [doi]
- VICTORIA: VMX indirect compute technology oriented towards in-line accelerationJeff H. Derby, Robert K. Montoye, José Moreira. 303-312 [doi]
- Cache miss behavior: is it sqrt(2)?Allan Hartstein, Viji Srinivasan, Thomas R. Puzak, Philip G. Emma. 313-320 [doi]
- An efficient cache design for scalable glueless shared-memory multiprocessorsAlberto Ros, Manuel E. Acacio, José M. García. 321-330 [doi]
- Lazy direct-to-cache transfer during receive operations in a message passing environmentFarshad Khunjush, Nikitas J. Dimopoulos. 331-340 [doi]
- Simple penalty-sensitive replacement policies for cachesJaeheon Jeong, Per Stenström, Michel Dubois. 341-352 [doi]
- Static cache partitioning robustness analysis for embedded on-chip multi-processorsAnca Mariana Molnos, Sorin Cotofana, Marc J. M. Heijligers, Jos T. J. van Eijndhoven. 353-360 [doi]
- Evaluation of the field-programmable cache: performance and energy consumptionDomingo Benitez, Juan C. Moure, Dolores Rexachs, Emilio Luque. 361-372 [doi]
- Intermediately executed code is the key to find refactorings that improve temporal data localityKristof Beyls, Erik H. D Hollander. 373-382 [doi]
- Topology-aware tile mapping for clusters of SMPsDaniel G. Chavarría-Miranda, Jarek Nieplocha, Vinod Tipparaju. 383-392 [doi]
- Performance characteristics of an adaptive mesh refinement calculation on scalar and vector platformsMichael L. Welcome, Charles A. Rendleman, Leonid Oliker, Rupak Biswas. 393-402 [doi]
- REPLICA2Pro: task relocation by bitstream manipulation in virtex-II/Pro FPGAsHeiko Kalte, Mario Porrmann. 403-412 [doi]