Abstract is missing.
- Timing analysis of erroneous systemsOmid Assare, Rajesh Gupta. 1-10 [doi]
- DAARM: Design-time application analysis and run-time mapping for predictable execution in many-core systemsAndreas Weichslgartner, Deepak Gangadharan, Stefan Wildermann, Michael Glaß, Jürgen Teich. 1-10 [doi]
- Leveraging microarchitectural side channel information to efficiently enhance program control flow integrityChen Liu, Chengmo Yang, Yuanqi Shen. 1-9 [doi]
- On-chip self-awareness using Cyberphysical-Systems-on-Chip (CPSoC)Santanu Sarma, Nikil Dutt, Puneet Gupta, Alexandru Nicolau, Nalini Venkatasubramanian. 1-3 [doi]
- Prediction and control of bursty cloud workloads: A fractal frameworkMahboobeh Ghorbani, Yanzhi Wang, Yuankun Xue, Massoud Pedram, Paul Bogdan. 1-9 [doi]
- HEFT: A hybrid system-level framework for enabling energy-efficient fault-tolerance in NoC based MPSoCsYong Zou, Sudeep Pasricha. 1-10 [doi]
- A low cost acceleration method for hardware trojan detection based on fan-out cone analysisBin Zhou, Wei Zhang, Thambipillai Srikanthan, J. K. J. Teo. 1-10 [doi]
- System-of-PUFs: Multilevel security for embedded systemsS. T. Choden Konigsmark, Leslie K. Hwang, Deming Chen, Martin D. F. Wong. 1-10 [doi]
- Workload-aware shaping of shared resource accesses in mixed-criticality systemsSebastian Tobuschat, Moritz Neukirchner, Leonardo Ecco, Rolf Ernst. 1-10 [doi]
- HSAemu - A full system emulator for HSA platformsJiun-Hung Ding, Wei-Chung Hsu, BaiCheng Jeng, Shih-Hao Hung, Yeh-Ching Chung. 1-10 [doi]
- System-level memory optimization for high-level synthesis of component-based SoCsChristian Pilato, Paolo Mantovani, Giuseppe Di Guglielmo, Luca P. Carloni. 1-10 [doi]
- Hypnos: An ultra-low power sleep mode with SRAM data retention for embedded microcontrollers!Hrishikesh Jayakumar, Arnab Raha, Vijay Raghunathan. 1-10 [doi]
- Policy-based message scheduling using FlexRayPhilipp Mundhenk, Florian Sagstetter, Sebastian Steinhorst, Martin Lukasiewycz, Samarjit Chakraborty. 1-10 [doi]
- An efficient technique for computing importance measures in automatic design of dependable embedded systemsHananeh Aliee, Michael Glaß, Faramarz Khosravi, Jürgen Teich. 1-10 [doi]
- 3M-PCM: Exploiting multiple write modes MLC phase change main memory in embedded systemsChen Pan, Mimi Xie, Jingtong Hu, Yiran Chen, Chengmo Yang. 1-10 [doi]
- Generating situation awareness in cyber-physical systems: Creation and exchange of situational informationJürgo Preden. 1-3 [doi]
- A PCM translation layer for integrated memory and storage managementBing-Jing Chang, Yuan-Hao Chang, Hung-Sheng Chang, Tei-Wei Kuo, Hsiang-Pang Li. 1-10 [doi]
- Metronomy: A function-architecture co-simulation framework for timing verification of cyber-physical systemsLiangpeng Guo, Qi Zhu, Pierluigi Nuzzo, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli, Edward A. Lee. 1-10 [doi]
- Verification of balancing architectures for modular batteriesMartin Lukasiewycz, Sebastian Steinhorst, Swaminathan Narayanaswamy. 1-10 [doi]
- Towards scalable symbolic routing for multi-objective networked embedded system design and optimizationSebastian Graf, Felix Reimann, Michael Glaß, Jürgen Teich. 1-10 [doi]
- Tackling QoS-induced aging in exascale systems through agile path selectionDean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy, Jason M. Allred. 1-10 [doi]
- Saving energy without defying deadlines on mobile GPU-based heterogeneous systemsArian Maghazeh, Unmesh D. Bordoloi, Adrian Horga, Petru Eles, Zebo Peng. 1-10 [doi]
- Dark silicon as a challenge for hardware/software co-designMuhammad Shafique, Siddharth Garg, Tulika Mitra, Sri Parameswaran, Jörg Henkel. 1-10 [doi]
- Cost-effective design of a hybrid electrical energy storage system for electric vehiclesDi Zhu, Siyu Yue, Sangyoung Park, Yanzhi Wang, Naehyuck Chang, Massoud Pedram. 1-8 [doi]
- Code generation from a domain-specific language for C-based HLS of hardware acceleratorsOliver Reiche, Moritz Schmid, Frank Hannig, Richard Membarth, Jürgen Teich. 1-10 [doi]
- RunPar: An allocation algorithm for automotive applications exploiting runnable parallelism in multicoresMilos Panic, Sebastian Kehr, Eduardo Quiñones, Bert Boddecker, Jaume Abella, Francisco J. Cazorla. 1-10 [doi]
- A framework of awareness for artificial subjectsAxel Jantsch, Kalle Tammemäe. 1-3 [doi]
- Hardware/software co-design for a wireless sensor network platformChih-Ming Hsieh, Farzad Samie, M. Sammer Srouji, ManYi Wang, Zhonglei Wang, Jörg Henkel. 1-10 [doi]
- Fault-aware application scheduling in low-power embedded systems with energy harvestingYi Xiang, Sudeep Pasricha. 1-10 [doi]
- Job arrival rate aware scheduling for asymmetric multi-core servers in the dark silicon eraBharathwaj Raghunathan, Siddharth Garg. 1-9 [doi]
- Automated firmware testing using firmware-hardware interaction patternsSunha Ahn, Sharad Malik. 1-10 [doi]
- Improving formal timing analysis of switched ethernet by exploiting traffic stream correlationsDaniel Thiele, Philip Axer, Rolf Ernst, Jan R. Seyler. 1-10 [doi]
- TSP: Thermal Safe Power - Efficient power budgeting for many-core systems in dark siliconSantiago Pagani, Heba Khdr, Waqaas Munawar, Jian-Jia Chen, Muhammad Shafique, Minming Li, Jörg Henkel. 1-10 [doi]
- Flattening-based mapping of imperfect loop nests for CGRAs?Jongeun Lee, Seongseok Seo, Hongsik Lee, Hyeon Uk Sim. 1-10 [doi]
- From self-aware building blocks to self-organizing systems with hierarchical agent-based adaptationLiang Guang, Juha Plosila, Hannu Tenhunen. 1-3 [doi]