Techniques for Increasing Security and Reliability of IP Cores Embedded in FPGA and ASIC Designs

Daniel Ziener. Techniques for Increasing Security and Reliability of IP Cores Embedded in FPGA and ASIC Designs. PhD thesis, University of Erlangen-Nuremberg, 2010. [doi]

Authors

Daniel Ziener

This author has not been identified. Look up 'Daniel Ziener' in Google