Abstract is missing.
- High Level System Design and Analysis Using Abstract State MachinesEgon Börger. 1-43
- Enriching the Software Development Process by Formal MethodsManfred Broy, Oscar Slotosch. 44-61
- Formal Program Development in Geometric ModelingFrançois Puitg, Jean-François Dufourd. 62-76
- Design of Distributed Multimedia Applications (DAMD)Wanderley Lopes de Souza, Paulo Nazareno Maia Sampaio, Jean-Marie Farines, Roberto Milton Scheffel, Maria Janilce B. Almeida, Luciano Paschoal Gaspary, Lisandro Zambenedetti Granville, Roberto Willrich, Murilo S. de Camargo, Marcelo Domingos. 77-91
- Structured Formal Verification of a Fragment of the IBM S/390 Clock ChipAlfons Geser, Wolfgang Küchlin. 92-106
- Automated Test Set Generation for StatechartsKirill Bogdanov, Mike Holcombe, Harbhajan Singh. 107-121
- Rigorous Compiler Implementation Correctness: How to Prove the Real Thing CorrectWolfgang Goerigk, Ulrich Hoffmann. 122-136
- Translation Validation: From DC+ to C*Amir Pnueli, Ofer Strichman, Michael Siegel. 137-150
- A Practical Hierarchical Design by Timed Simulation Relations for Real-Time SystemsSatoshi Yamane. 151-167
- A Lightweight Approach to Formal MethodsSten Agerholm, Peter Gorm Larsen. 168-183
- An Open Environment for the Integration of Hetereogenous Modelling Techniques and ToolsRobert Büssow, Wolfgang Grieskamp, Winfried Heicking, Stephan Herrmann. 184-195
- Integrating Domain Specific Language Design in the Software Life CyclePhilipp W. Kutter, Daniel Schweizer, Lothar Thiele. 196-212
- Flexible and Reliable Process Model Properties: An Integrated ApproachTiziana Margaria, Volker Gruhn. 213-227
- A Symbolic Model Checker for ACTLAlessandro Fantechi, Stefania Gnesi, Franco Mazzanti, Rosario Pugliese, Enrico Tronci. 228-242
- Critical Systems Validation and Verification with CSP and FDRMichael Goldsmith, Irfan Zakiuddin. 243-250
- UniForM Perspectives for Formal MethodsBernd Krieg-Brückner. 251-265
- The UniForM WorkBench - A Higher Order Tool Integration FrameworkEinar W. Karlsen. 266-280
- Two Real Formal Verification Experiences: ATM Switch Chip and Parallel Cache ProtocolMasahiro Fujita, Sreeranga P. Rajan, Alan J. Hu. 281-295
- Formal Methods in the Specification of the Emergency Closing System of the Eastern Scheldt Storm Surge BarrierMeine van der Meulen, Tim Clement. 296-301
- The New Topicality of Using Formal Models of Security Policy within the Security Engineering ProcessFrank Koob, Markus Ullmann, Stefan Wittmann. 302-310
- Towards Comprehensive Tool Support for Abstract State Machines: The ASM Workbench Tool Environment and ArchitectureGiuseppe Del Castillo. 311-325
- The IFAD VDM Tools: Lightweight Formal MethodsSten Agerholm, Peter Gorm Larsen. 326-329
- KIV 3.0 for Provably Correct SystemsMichael Balser, Wolfgang Reif, Gerhard Schellhorn, Kurt Stenzel. 330-337
- PVS: An Experience ReportSam Owre, John M. Rushby, Natarajan Shankar, David W. J. Stringer-Calvert. 338-345
- QUEST: Overview over the ProjectOscar Slotosch. 346-350
- VSE: Controlling the Complexity in Formal Software DevelopmentsDieter Hutter, Heiko Mantel, Georg Rock, Werner Stephan, Andreas Wolpers, Michael Balser, Wolfgang Reif, Gerhard Schellhorn, Kurt Stenzel. 351-358
- The wHOLe SystemMark E. Woodcock. 359-366
- Z/EVES Version 1.5: An OverviewOra Canada. 367-376