Abstract is missing.
- Efficient HW and SW Interface Design for Convolutional Neural Networks Using High-Level Synthesis and TensorFlowAshish Misra, Churan He, Volodymyr V. Kindratenko. 1-8 [doi]
- Porting incompressible flow matrix assembly to FPGAs for accelerating HPC engineering simulationsNick Brown. 9-20 [doi]
- Optimizing a Hardware Network Stack to Realize an In-Network ML Inference ApplicationMarco Hartmann, Lukas Weber, Johannes Wirth, Lukas Sommer, Andreas Koch 0001. 21-32 [doi]
- ACCL: FPGA-Accelerated Collectives over 100 Gbps TCP-IPZhenhao He, Daniele Parravicini, Lucian Petrica, Kenneth O'Brien, Gustavo Alonso, Michaela Blott. 33-43 [doi]
- Near-Data FPGA-Accelerated Processing of Collective and Inference Operations in Disaggregated Memory SystemsCarsten Heinz, Andreas Koch 0001. 44-51 [doi]