Transforming TLP into DLP with the Dynamic Inter-Thread Vectorization Architecture. (Transformer le TLP en DLP avec l'architecture de vectorization dynamique inter-thread)

Sajith Kalathingal. Transforming TLP into DLP with the Dynamic Inter-Thread Vectorization Architecture. (Transformer le TLP en DLP avec l'architecture de vectorization dynamique inter-thread). PhD thesis, University of Rennes 1, France, 2016. [doi]

Authors

Sajith Kalathingal

This author has not been identified. Look up 'Sajith Kalathingal' in Google