Abstract is missing.
- High-Speed Optical Cache Memory as Single-Level Shared Cache in Chip-Multiprocessor ArchitecturesPavlos Maniotis, Savvas Gitzenis, Leandros Tassiulas, Nikos Pleros. 1-8 [doi]
- On the Design of a Path-Setup Architecture for Exploiting Hybrid Photonic-Electronic NoCsEdoardo Fusella, Jose Flich, Alessandro Cilardo, Antonino Mazzeo. 9-16 [doi]
- Partitioning Strategies of Wavelength-Routed Optical Networks-on-Chip for Laser Power MinimizationMarta Ortín, Luca Ramini, Marco Balboni, Lorenzo Zuolo, Maddalena Nonato, Víctor Viñals, Davide Bertozzi. 17-24 [doi]
- Optimal Power Efficient Photonic SWMR BusesEldhose Peter, Smruti R. Sarangi. 25-32 [doi]
- Channel Allocation Protocol for Reconfigurable Optical Network-on-ChipJiating Luo, Cedric Killian, Sébastien Le Beux, Daniel Chillet, Hui Li, Ian O'Connor, Olivier Sentieys. 33-39 [doi]