Abstract is missing.
- Accelerator-Driven Data Arrangement to Minimize Transformers Run-Time on Multi-Core ArchitecturesAlireza Amirshahi, Giovanni Ansaloni, David Atienza. [doi]
- Accelerating Large-Scale Graph Processing with FPGAs: Lesson Learned and Future DirectionsMarco Procaccini, Amin Sahebi, Marco Barbone, Wayne Luk, Georgi Gaydadjiev, Roberto Giorgi. [doi]
- High-Level Synthesis Developments in the Context of European Space Technology Research (Invited Talk)Fabrizio Ferrandi, Michele Fiorito, Claudio Barone, Giovanni Gozzi, Serena Curzel. [doi]
- Front Matter, Table of Contents, Preface, Conference Organization [doi]
- Zero-Copy, Minimal-Blackout Virtual Machine Migrations Using Disaggregated Shared MemoryAndreas Grapentin, Felix Eberhardt, Tobias Zagorni, Andreas Polze, Michele Gazzetti, Christian Pinto. [doi]
- Embedded Multi-Core Code Generation with Cross-Layer ParallelizationOliver Oey, Michael Hübner 0001, Timo Stripf, Jürgen Becker 0001. [doi]
- Precision Tuning the Rust Memory-Safe Programming LanguageGabriele Magnani, Lev Denisov, Daniele Cattaneo 0002, Giovanni Agosta, Stefano Cherubin. [doi]