Abstract is missing.
- Accelerating Agent-Based Ecosystem Models Using the Cell Broadband EngineMichael Lange, Tony Field. 1-12 [doi]
- Performance Impact of Task Mapping on the Cell BE Multicore ProcessorJörg Keller, Ana Lucia Varbanescu. 13-23 [doi]
- Parallelization Strategy for CELL TVMotohiro Takayama, Ryuji Sakai. 24-27 [doi]
- Towards User Transparent Parallel Multimedia Computing on GPU-ClustersBen van Werkhoven, Jason Maassen, Frank J. Seinstra. 28-39 [doi]
- Implementing a GPU Programming Model on a Non-GPU Accelerator ArchitectureStephen M. Kofsky, Daniel R. Johnson, John A. Stratton, Wen-mei W. Hwu, Sanjay J. Patel, Steven S. Lumetta. 40-51 [doi]
- On the Use of Small 2D Convolutions on GPUsShams A. H. Al Umairy, Alexander S. van Amesfoort, Irwan D. Setija, Martijn C. van Beurden, Henk J. Sips. 52-64 [doi]
- Can Manycores Support the Memory Requirements of Scientific Applications?Milan Pavlovic, Yoav Etsion, Alex Ramírez. 65-76 [doi]
- Parallelizing an Index Generator for Desktop SearchDavid J. Meder, Walter F. Tichy. 77-85 [doi]
- Computation vs. Memory Systems: Pinning Down Accelerator BottlenecksMartha A. Kim, Stephen A. Edwards. 86-98 [doi]
- Trace Execution Automata in Dynamic Binary TranslationJoão Paulo Porto, Guido Araujo, Edson Borin, Youfeng Wu. 99-116 [doi]
- ISAMAP: Instruction Mapping Driven by Dynamic Binary TranslationMaxwell Souza, Daniel Nicácio, Guido Araujo. 117-138 [doi]
- Parallelization of Particle Filter AlgorithmsMatthew A. Goodrum, Michael J. Trotter, Alla Aksel, Scott T. Acton, Kevin Skadron. 139-149 [doi]
- What Kinds of Applications Can Benefit from Transactional Memory?Mark Moir, Daniel Nussbaum. 150-160 [doi]
- Characteristics of Workloads Using the Pipeline Programming ModelChristian Bienia, Kai Li. 161-171 [doi]
- The Search for Energy-Efficient Building Blocks for the Data CenterLaura Keys, Suzanne Rivoire, John D. Davis. 172-182 [doi]
- KnightShift: Shifting the I/O Burden in Datacenters to Management Processor for Energy EfficiencySabyasachi Ghosh, Mark Redekopp, Murali Annavaram. 183-197 [doi]
- Guarded Power Gating in a Multi-core SettingNiti Madan, Alper Buyuktosunoglu, Pradip Bose, Murali Annavaram. 198-210 [doi]
- Using Partial Tag Comparison in Low-Power Snoop-Based Chip MultiprocessorsAli Shafiee, Narges Shahidi, Amirali Baniasadi. 211-221 [doi]
- Achieving Power-Efficiency in Clusters without Distributed File System ComplexityHrishikesh Amur, Karsten Schwan. 222-232 [doi]
- What Computer Architects Need to Know about Memory ThrottlingHeather Hanson, Karthick Rajamani. 233-242 [doi]
- Predictive Power Management for Multi-core ProcessorsWilliam Lloyd Bircher, Lizy K. John. 243-255 [doi]
- IOMMU: Strategies for Mitigating the IOTLB BottleneckNadav Amit, Muli Ben-Yehuda, Ben-Ami Yassour. 256-274 [doi]
- Improving Server Performance on Multi-cores via Selective Off-Loading of OS FunctionalityDavid W. Nellans, Kshitij Sudan, Erik Brunvand, Rajeev Balasubramonian. 275-292 [doi]
- Performance Characteristics of Explicit Superpage SupportMel Gorman, Patrick Healy. 293-310 [doi]
- Interfacing Operating Systems and Polymorphic Computing Platforms Based on the MOLEN Programming ParadigmMojtaba Sabeghi, Koen Bertels. 311-323 [doi]
- Extrinsic and Intrinsic Text CloningMarios Kleanthous, Yiannakis Sazeides, Marios D. Dikaiakos. 324-340 [doi]
- A Case for Coordinated Resource Management in Heterogeneous Multicore PlatformsPriyanka Tembey, Ada Gavrilovska, Karsten Schwan. 341-356 [doi]
- Topology-Aware Quality-of-Service Support in Highly Integrated Chip MultiprocessorsBoris Grot, Stephen W. Keckler, Onur Mutlu. 357-375 [doi]