Table of Contents

• Perceptron-based prefetch filteringEshan Bhatia, Gino Chacon, Seth H. Pugsley, Elvira Teran, Paul V. Gratz, Daniel A. Jiménez. 1-13 [doi]
• Post-silicon CPU adaptation made practical using machine learningStephen J. Tarsa, Rangeen Basu Roy Chowdhury, Julien Sebot, Gautham N. Chinya, Jayesh Gaur, Karthik Sankaranarayanan, Chit-Kwan Lin, Robert Chappell, Ronak Singhal, Hong Wang. 14-26 [doi]
• Bit-level perceptron prediction for indirect branchesElba Garza, Samira Mirbagher Ajorpaz, Tahsin Ahmad Khan, Daniel A. Jiménez. 27-38 [doi]
• Generative and multi-phase learning for computer systems optimizationYi Ding, Nikita Mishra, Henry Hoffmann. 39-52 [doi]
• OO-VR: NUMA friendly object-oriented VR rendering framework for future NUMA-based multi-GPU systemsChenhao Xie, Xin Fu, Mingsong Chen, Shuaiwen Leon Song. 53-65 [doi]
• PES: proactive event scheduling for responsive and energy-efficient mobile web computingYu Feng, Yuhao Zhu. 66-78 [doi]
• 3D-based video recognition acceleration by leveraging temporal localityHuixiang Chen, Mingcong Song, Jiechen Zhao, Yuting Dai, Tao Li. 79-90 [doi]
• Energy-efficient video processing for virtual realityYue Leng, Chi-Chun Chen, Qiuyue Sun, Jian Huang, Yuhao Zhu. 91-103 [doi]
• Triad-NVM: persistency for integrity-protected and encrypted non-volatile memoriesAmro Awad, Mao Ye, Yan Solihin, Laurent Njilla, Kazi Abu Zubair. 104-115 [doi]
• GraphSSD: graph semantics aware SSDKiran Kumar Matam, Gunjae Koo, Haipeng Zha, Hung-Wei Tseng, Murali Annavaram. 116-128 [doi]
• CROW: a low-cost substrate for improving DRAM performance, energy efficiency, and reliabilityHasan Hassan, Minesh Patel, Jeremie S. Kim, Abdullah Giray Yaglikçi, Nandita Vijaykumar, Nika Mansouri-Ghiasi, Saugata Ghose, Onur Mutlu. 129-142 [doi]
• Janus: optimizing memory and storage support for non-volatile memory systemsSihang Liu 0001, Korakit Seemakhupt, Gennady Pekhimenko, Aasheesh Kolli, Samira Khan. 143-156 [doi]
• Anubis: ultra-low overhead and recovery time for secure non-volatile memoriesKazi Abu Zubair, Amro Awad. 157-168 [doi]
• Emerald: graphics modeling for SoC systemsAyub A. Gubran, Tor M. Aamodt. 169-182 [doi]
• Linebacker: preserving victim cache lines in idle register files of GPUsYunho Oh, Gunjae Koo, Murali Annavaram, Won Woo Ro. 183-196 [doi]
• MGPUSim: enabling multi-GPU performance modeling and optimizationYifan Sun, Trinayan Baruah, Saiful A. Mojumder, Shi Dong, Xiang Gong, Shane Treadway, Yuhui Bao, Spencer Hance, Carter McCardwell, Vincent Zhao, Harrison Barclay, Amir Kavyan Ziabari, Zhongliang Chen, Rafael Ubal, José L. Abellán, John Kim, Ajay Joshi, David R. Kaeli. 197-209 [doi]
• Opportunistic computing in GPU architecturesAshutosh Pattnaik, Xulong Tang, Onur Kayiran, Adwait Jog, Asit K. Mishra, Mahmut T. Kandemir, Anand Sivasubramaniam, Chita R. Das. 210-223 [doi]
• Interplay between hardware prefetcher and page eviction policy in CPU-GPU unified virtual memoryDebashis Ganguly, Ziyu Zhang, Jun Yang, Rami G. Melhem. 224-235 [doi]
• Sparse ReRAM engine: joint exploration of activation and weight sparsity in compressed neural networksTzu-Hsien Yang, Hsiang-Yun Cheng, Chia-Lin Yang, I-Ching Tseng, Han-Wen Hu, Hung-Sheng Chang, Hsiang-Pang Li. 236-249 [doi]
• MnnFast: a fast and scalable system architecture for memory-augmented neural networksHanhwi Jang, Joonsung Kim, Jae-Eon Jo, Jaewon Lee, Jangwoo Kim. 250-263 [doi]
• TIE: energy-efficient tensor train-based inference engine for deep neural networkChunhua Deng, Fangxuan Sun, Xuehai Qian, Jun Lin, Zhongfeng Wang, Bo Yuan. 264-278 [doi]
• Accelerating distributed reinforcement learning with in-switch computingYoujie Li, Iou-Jen Liu, Yifan Yuan, Deming Chen, Alexander G. Schwing, Jian Huang. 279-291 [doi]
• Eager pruning: algorithm and architecture support for fast training of deep neural networksJiaqi Zhang, Xiangru Chen, Mingcong Song, Tao Li. 292-303 [doi]
• Laconic deep learning inference accelerationSayeh Sharify, Alberto Delmas Lascorz, Mostafa Mahmoud, Milos Nikolic, Kevin Siu, Dylan Malone Stuart, Zissis Poulos, Andreas Moshovos. 304-317 [doi]
• MicroScope: enabling microarchitectural replay attacksDimitrios Skarlatos, Mengjia Yan, Bhargava Gopireddy, Read Sprabery, Josep Torrellas, Christopher W. Fletcher. 318-331 [doi]
• SecDir: a secure directory to defeat directory side-channel attacksMengjia Yan, Jen-Yang Wen, Christopher W. Fletcher, Josep Torrellas. 332-345 [doi]
• Secure TLBsShuwen Deng, Wenjie Xiong 0001, Jakub Szefer. 346-259 [doi]
• New attacks and defense for encrypted-address cacheMoinuddin K. Qureshi. 360-371 [doi]
• InvisiPage: oblivious demand paging for secure enclavesShaizeen Aga, Satish Narayanasamy. 372-384 [doi]
• TWiCe: preventing row-hammering by exploiting time window countersEojin Lee, Ingab Kang, Sukhan Lee 0002, G. Edward Suh, Jung Ho Ahn. 385-396 [doi]
• Duality cache for data parallel accelerationDaichi Fujiki, Scott A. Mahlke, Reetuparna Das. 397-410 [doi]
• Adaptive memory-side last-level GPU cachingXia Zhao, Almutaz Adileh, Zhibin Yu 0001, Zhiying Wang, Aamer Jaleel, Lieven Eeckhout. 411-423 [doi]
• SCU: a GPU stream compaction unit for graph processingAlbert Segura, Jose-Maria Arnau, Antonio González 0001. 424-435 [doi]
• Filter caching for free: the untapped potential of the store-bufferRicardo Alves, Alberto Ros, David Black-Schaffer, Stefanos Kaxiras. 436-448 [doi]
• Efficient metadata management for irregular data prefetchingHao Wu, Krishnendra Nathella, Dam Sunwoo, Akanksha Jain, Calvin Lin. 449-461 [doi]
• AsmDB: understanding and mitigating front-end stalls in warehouse-scale computersGrant Ayers, Nayana Prasad Nagendra, David I. August, Hyoun Kyu Cho, Svilen Kanev, Christos Kozyrakis, Trivikram Krishnamurthy, Heiner Litz, Tipp Moseley, Parthasarathy Ranganathan. 462-473 [doi]
• Fine-grained warm water cooling for improving datacenter economyWeixiang Jiang, Ziyang Jia, Sirui Feng, Fangming Liu, Hai Jin 0001. 474-486 [doi]
• DeepAttest: an end-to-end attestation framework for deep neural networksHuili Chen, Cheng Fu, Bita Darvish Rouhani, Jishen Zhao, Farinaz Koushanfar. 487-498 [doi]
• TPShare: a time-space sharing scheduling abstraction for shared cloud via vertical labelsYuzhao Wang, Lele Li, You Wu, Junqing Yu, Zhibin Yu, Xuehai Qian. 499-512 [doi]
• SoftSKU: optimizing server architectures for microservice diversity @scaleAkshitha Sriraman, Abhishek Dhanotia, Thomas F. Wenisch. 513-526 [doi]
• Full-stack, real-system quantum computer studies: architectural comparisons and design insightsPrakash Murali, Norbert Matthias Linke, Margaret Martonosi, Ali Javadi-Abhari, Nhung Hong Nguyen, Cinthia Huerta Alderete. 527-540 [doi]
• Statistical assertions for validating patterns and finding bugs in quantum programsYipeng Huang 0001, Margaret Martonosi. 541-553 [doi]
• Asymptotic improvements to quantum circuits via qutritsPranav Gokhale, Jonathan M. Baker, Casey Duckering, Natalie C. Brown, Kenneth R. Brown, Frederic T. Chong. 554-566 [doi]
• A stochastic-computing based deep learning framework using adiabatic quantum-flux-parametron superconducting technologyRuizhe Cai, Ao Ren, Olivia Chen, Ning Liu, Caiwen Ding, Xuehai Qian, Jie Han 0001, Wenhui Luo, Nobuyuki Yoshikawa, Yanzhi Wang. 567-578 [doi]
• A quantum computational compiler and design tool for technology-specific targetsKaitlin N. Smith, Mitchell A. Thornton. 579-588 [doi]
• IntelliNoC: a holistic design framework for energy-efficient and reliable on-chip communication for manycoresKe Wang, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu. 589-600 [doi]
• HALO: accelerating flow classification for scalable packet processing in NFVYifan Yuan, Yipeng Wang, Ren Wang, Jian Huang. 601-614 [doi]
• Scalable interconnects for reconfigurable spatial architecturesYaqi Zhang, Alexander Rucker, Matthew Vilim, Raghu Prabhakar, William Hwang, Kunle Olukotun. 615-628 [doi]
• CoNDA: efficient cache coherence support for near-data acceleratorsAmirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Rachata Ausavarungnirun, Kevin Hsieh, Nastaran Hajinazar, Krishna T. Malladi, Hongzhong Zheng, Onur Mutlu. 629-642 [doi]
• Designing vertical processors in monolithic 3DBhargava Gopireddy, Josep Torrellas. 643-656 [doi]
• Time squeezing for tiny devicesYuanbo Fan, Simone Campanoni, Russ Joseph. 657-670 [doi]
• XPC: architectural support for secure and efficient cross process callDong Du, Zhichao Hua, Yubin Xia, Binyu Zang, Haibo Chen. 671-684 [doi]
• AxMemo: hardware-compiler co-design for approximate code memoizationZhenhong Liu, Amir Yazdanbakhsh, Dong Kai Wang, Hadi Esmaeilzadeh, Nam Sung Kim. 685-697 [doi]
• Translation ranger: operating system support for contiguity-aware TLBsZi Yan, Daniel Lustig, David Nellans, Abhishek Bhattacharjee. 698-710 [doi]
• Bouncer: static program analysis in hardwareJoseph McMahan, Michael Christensen, Kyle Dewey, Ben Hardekopf, Timothy Sherwood. 711-722 [doi]
• Efficient invisible speculative execution through selective delay and value predictionChristos Sakalis, Stefanos Kaxiras, Alberto Ros, Alexandra Jimborean, Magnus Själander. 723-735 [doi]
• Stream-based memory access specialization for general purpose processorsZhengrong Wang, Tony Nowatzki. 736-749 [doi]
• Using SMT to accelerate nested virtualizationLluís Vilanova, Nadav Amit, Yoav Etsion. 750-761 [doi]
• Master of none acceleration: a comparison of accelerator architectures for analytical query processingAndrea Lottarini, João Pedro Cerqueira, Thomas J. Repetti, Stephen A. Edwards, Kenneth A. Ross, Mingoo Seok, Martha A. Kim. 762-773 [doi]
• Cryogenic computer architecture modeling with memory-side case studiesGyu-hyeon Lee, Dongmoon Min, Ilkwon Byun, Jangwoo Kim. 774-787 [doi]
• Cambricon-F: machine learning computers with fractal von neumann architectureYongwei Zhao, Zidong Du, Qi Guo, Shaoli Liu, Ling Li 0001, Zhiwei Xu, Tianshi Chen, Yunji Chen. 788-801 [doi]
• FloatPIM: in-memory acceleration of deep neural network training with high precisionMohsen Imani, Saransh Gupta, Yeseong Kim, Tajana Rosing. 802-815 [doi]