Abstract is missing.
- Message from the Program Chairs; ISPASS 2024Wim Heirman, Stijn Eyerman. [doi]
- Message from the General Chair; ISPASS 2024Timothy Rogers. [doi]
- Aiding Microprocessor Performance Validation with Machine LearningErick Carvajal Barboza, Mahesh Ketkar, Paul Gratz, Jiang Hu. 1-9 [doi]
- CiMLoop: A Flexible, Accurate, and Fast Compute-In-Memory Modeling ToolTanner Andrulis, Joel S. Emer, Vivienne Sze. 10-23 [doi]
- Characterizing In-Kernel Observability of Latency-Sensitive Request-Level Metrics with eBPFMohammadreza Rezvani, Ali Jahanshahi, Daniel Wong 0001. 24-35 [doi]
- BTBench: A Benchmark for Comprehensive Binary Translation Performance EvaluationXinyu Li, Yanzhi Lan, Gen Niu, Feng Xue, Fuxin Zhang. 36-47 [doi]
- MuchiSim: A Simulation Framework for Design Exploration of Multi-Chip Manycore SystemsMarcelo Orenes-Vera, Esin Tureci, Margaret Martonosi, David Wentzlaff. 48-60 [doi]
- CiFlow: Dataflow Analysis and Optimization of Key Switching for Homomorphic EncryptionNegar Neda, Austin Ebel, Benedict Reynwar, Brandon Reagen. 61-72 [doi]
- Workload Characterization of Commercial Mobile Benchmark SuitesVictor Kariofillis, Natalie Enright Jerger. 73-84 [doi]
- RTune: Towards Automated and Coordinated Optimization of Computing and Computational Objectives of Parallel Iterative ApplicationsYonghong Yan 0001, Kewei Yan, Anjia Wang. 85-95 [doi]
- Characterizing Soft-Error Resiliency in Arm's Ethos-U55 Embedded Machine Learning AcceleratorAbhishek Tyagi, Reiley Jeyapaul, Chuteng Zhou, Paul N. Whatmough, Yuhao Zhu 0001. 96-108 [doi]
- SAP: Silicon Authentication Platform for System-on-Chip Supply Chain VulnerabilitiesMd Sami Ul Islam Sami, Jingbo Zhou, Sujan Kumar Saha, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor. 109-119 [doi]
- SimPoint-Based Microarchitectural Hotspot & Energy-Efficiency Analysis of RISC-V OoO CPUsOdysseas Chatzopoulos, Maria Trakosa, George Papadimitriou 0001, Wing Shek Wong, Dimitris Gizopoulos. 120-131 [doi]
- On the Rise of AMD Matrix Cores: Performance, Power Efficiency, and ProgrammabilityGabin Schieffer, Daniel Araújo de Medeiros, Jennifer Faj, Aniruddha Marathe, Ivy Peng. 132-143 [doi]
- DNA Storage Toolkit: A Modular End-to-End DNA Data Storage Codec and SimulatorPuru Sharma, Gary Goh Yipeng, Bin Gao, Longshen Ou, Dehui Lin, Deepak Sharma, Djordje Jevdjic. 144-155 [doi]
- Zatel: Sample Complexity-Aware Scale-Model Simulation for Ray TracingDavit Grigoryan, Yuan-Hsi Chou, Tor M. Aamodt. 156-166 [doi]
- BZSim: Fast, Large-Scale Microarchitectural Simulation with Detailed Interconnect ModelingPanagiotis Strikos, Ahsen Ejaz, Ioannis Sourdis. 167-178 [doi]
- Userspace Networking in gem5Johnson Umeike, Siddharth Agarwal, Nikita Lazarev, Mohammad Alian. 179-191 [doi]
- Vision Transformer Computation and Resilience for Dynamic InferenceKavya Sreedhar, Jason Clemons, Rangharajan Venkatesan, Stephen W. Keckler, Mark Horowitz. 192-204 [doi]
- LIBRA: Enabling Workload-Aware Multi-Dimensional Network Topology Optimization for Distributed Training of Large AI ModelsWilliam Won, Saeed Rashidi, Sudarshan Srinivasan, Tushar Krishna. 205-216 [doi]
- SwiftRL: Towards Efficient Reinforcement Learning on Real Processing-In-Memory SystemsKailash Gogineni, Sai Santosh Dayapule, Juan Gómez-Luna, Karthikeya Gogineni, Peng Wei, Tian Lan, Mohammad Sadrosadati, Onur Mutlu, Guru Venkataramani. 217-229 [doi]
- Forward to the Past: An Alternative to Hybrid CPU DesignSanyam Mehta, Anna Yue. 230-240 [doi]
- Bandwidth Characterization of DeepSpeed on Distributed Large Language Model TrainingBagus Hanindhito, Bhavesh Patel, Lizy K. John. 241-256 [doi]
- Generative AI Beyond LLMs: System Implications of Multi-Modal GenerationAlicia Golden, Samuel Hsia, Fei Sun, Bilge Acun, Basil Hosmer, Yejin Lee 0010, Zachary Devito, Jeff Johnson 0004, Gu-Yeon Wei, David Brooks 0001, Carole-Jean Wu. 257-267 [doi]
- Towards Cognitive AI Systems: Workload and Characterization of Neuro-Symbolic AIZishen Wan, Che-Kai Liu, Hanchen Yang, Ritik Raj, Chaojian Li, Haoran You, Yonggan Fu, Cheng Wan, Ananda Samajdar, Yingyan Celine Lin, Tushar Krishna, Arijit Raychowdhury. 268-279 [doi]
- Scaling Down to Scale Up: A Cost-Benefit Analysis of Replacing OpenAI's LLM with Open Source SLMs in ProductionChandra Irugalbandara, Ashish Mahendra, Roland Daynauth, Tharuka Kasthuri Arachchige, Jayanaka Dantanarayana, Krisztián Flautner, Lingjia Tang, Yiping Kang, Jason Mars. 280-291 [doi]
- Leveraging Memory Expansion to Accelerate Large-Scale DL TrainingDivya Kiran Kadiyala, Saeed Rashidi, Taekyung Heo, Abhimanyu Bambhaniya, Tushar Krishna, Alexandros Daglis. 292-294 [doi]
- APGPM: Automated PMC-Based Power Modeling Methodology for Modern Mobile GPUsPranab Dash, Y. Charlie Hu, Abhilash Jindal. 295-297 [doi]
- Gem5-Based Evaluation of CVA6 SoC: Insights into the Architectural DesignUmer Shahid, Ayesha Ahmad, Shanzay Wasim. 298-300 [doi]
- Accel-Bench: Exploring the Potential of Programming Using Hardware-Accelerated FunctionsAbenezer Wudenhe, Yu-Chia Liu, Chris Chen, Hung-Wei Tseng 0001. 301-303 [doi]
- SEFsim: A Statistically-Guided Fast DRAM SimulatorDebpratim Adak, Hyokeun Lee, Ben Feinberg, Gwendolyn Voskuilen, Clayton Hughes, Huiyang Zhou, Amro Awad. 304-306 [doi]
- Architecture-Level Modeling of Photonic Deep Neural Network AcceleratorsTanner Andrulis, Gohar Irfan Chaudhry, Vinith M. Suriyakumar, Joel S. Emer, Vivienne Sze. 307-309 [doi]
- Automatic Extraction of Network Configurations for Realistic Simulation and ValidationJoshua Suetterlein, Stephen J. Young, J. esun Firoz, Joseph B. Manzano, Ryan D. Friese, Nathan R. Tallent, Kevin J. Barker, Timothy Stavenger. 310-312 [doi]
- MindPalace: A Framework for Studying Microarchitecture Design of Function-as-a-ServiceKaifeng Xu, Georgios Tziantzioulis, David Wentzlaff. 313-315 [doi]
- Infrastructure for Exploring SIMT Architecture in General-Purpose ProcessorsNikitha Karman, Kevin Wei, Dylan Scott, Natheesan Ratnasegar, Oguzhan Canpolat, Hieu Mai, Michael Ferdman. 316-318 [doi]
- Distributed Training of Neural Radiance Fields: A Performance CharacterizationAdrian Zhao, Louis Zhang, Sankeerth Durvasula, Fan Chen, Nilesh Jain, Selvakumar Panneer, Nandita Vijaykumar. 319-321 [doi]
- Bottleneck Scenarios in Use of the Conveyors Message Aggregation LibraryShubhendra Pal Singhal, Akihiro Hayashi, Vivek Sarkar. 322-324 [doi]
- A Profiling-Based Benchmark Suite for Warehouse-Scale ComputersAndreas Abel 0006, Yuying Li, Richard O'Grady, Chris Kennelly, Darryl Gove. 325-327 [doi]
- Characterizing Dynamic Memory Behavior in WebAssembly WorkloadsYuxin Qin, Dejice Jacob, Jeremy Singer. 328-330 [doi]
- Probing Weaknesses in GPU Reliability Assessment: A Cross-Layer ApproachLishan Yang, George Papadimitriou 0001, Dimitrios Sartzetakis, Adwait Jog, Evgenia Smirni, Dimitris Gizopoulos. 331-333 [doi]