Abstract is missing.
- Compilation Techniques for Partitioned Global Address Space LanguagesKatherine A. Yelick. 1 [doi]
- Can Transactions Enhance Parallel Programs?Troy A. Johnson, Sang Ik Lee, Seung-Jai Min, Rudolf Eigenmann. 2-16 [doi]
- Design and Use of htalib - A Library for Hierarchically Tiled ArraysGanesh Bikshandi, Jia Guo, Christoph von Praun, Gabriel Tanase, Basilio B. Fraguela, María Jesús Garzarán, David A. Padua, Lawrence Rauchwerger. 17-32 [doi]
- SP@CE - An SP-Based Programming Model for Consumer Electronics Streaming ApplicationsAna Lucia Varbanescu, Maik Nijhuis, Arturo González-Escribano, Henk J. Sips, Herbert Bos, Henri E. Bal. 33-48 [doi]
- Data Pipeline Optimization for Shared Memory Multiple-SIMD ArchitectureWeihua Zhang, Tao Bao, Binyu Zang, Chuanqi Zhu. 49-63 [doi]
- Dependence-Based Code Generation for a CELL ProcessorYuan Zhao, Ken Kennedy. 64-79 [doi]
- Expression and Loop Libraries for High-Performance Code SynthesisChristopher Mueller, Andrew Lumsdaine. 80-95 [doi]
- Applying Code Specialization to FFT Libraries for Integral ParametersMinhaj Ahmad Khan, Henri-Pierre Charles. 96-110 [doi]
- A Characterization of Shared Data Access Patterns in UPC ProgramsChristopher Barton, Calin Cascaval, José Nelson Amaral. 111-125 [doi]
- Exploiting Speculative Thread-Level Parallelism in Data Compression ApplicationsShengyue Wang, Antonia Zhai, Pen-Chung Yew. 126-140 [doi]
- On Control Signals for Multi-Dimensional TimeDaeGon Kim, Gautam Gupta, Sanjay V. Rajopadhye. 141-155 [doi]
- The Berkeley View: A New Framework and a New Platform for Parallel ResearchDavid Patterson. 156-157 [doi]
- An Effective Heuristic for Simple Offset Assignment with Variable CoalescingHassan Salamy, J. Ramanujam. 158-172 [doi]
- Iterative Compilation with Kernel ExplorationDenis Barthou, Sébastien Donadio, Alexandre Duchateau, William Jalby, E. Courtois. 173-189 [doi]
- Quantifying Uncertainty in Points-To RelationsConstantino G. Ribeiro, Marcelo Cintra. 190-204 [doi]
- Cache Behavior Modelling for Codes Involving Banded MatricesDiego Andrade, Basilio B. Fraguela, Ramon Doallo. 205-219 [doi]
- Tree-Traversal Orientation AnalysisKevin Andrusky, Stephen Curial, José Nelson Amaral. 220-234 [doi]
- UTS: An Unbalanced Tree Search BenchmarkStephen Olivier, Jun Huan, Jinze Liu, Jan Prins, James Dinan, P. Sadayappan, Chau-Wen Tseng. 235-250 [doi]
- Copy Propagation Optimizations for VLIW DSP Processors with Distributed Register FilesChung-Ju Wu, Sheng-Yuan Chen, Jenq Kuen Lee. 251-266 [doi]
- Optimal Bitwise Register Allocation Using Integer Linear ProgrammingRajkishore Barik, Christian Grothoff, Rahul Gupta, Vinayaka Pandit, Raghavendra Udupa. 267-282 [doi]
- Register Allocation: What Does the NP-Completeness Proof of Chaitin et al. Really Prove? Or Revisiting Register Allocation: Why and HowFlorent Bouchez, Alain Darte, Christophe Guillon, Fabrice Rastello. 283-298 [doi]
- Custom Memory Allocation for FreeAlin Jula, Lawrence Rauchwerger. 299-313 [doi]
- Optimizing the Use of Static Buffers for DMA on a CELL ChipTong Chen, Zehra Sura, Kathryn M. O Brien, John K. O Brien. 314-329 [doi]
- Runtime Address Space Computation for SDSM SystemsJairo Balart, Marc González, Xavier Martorell, Eduard Ayguadé, Jesús Labarta. 330-344 [doi]
- A Static Heap Analysis for Shape and Connectivity: Unified Memory Analysis: The Base FrameworkMark Marron, Deepak Kapur, Darko Stefanovic, Manuel V. Hermenegildo. 345-363 [doi]