Abstract is missing.
- RAPO: Retrieval-Augmented Phase OrderingJinWook Yang, Junghyun Lee, Yeonsun-Hong, Hyojin Sung. 1-14 [doi]
- CausalTuner: Feature-Aware Causal Guidance for Compiler Auto-tuningJiaqing Zhong, Juan Chen 0001, Yichang Zhou, Kuan Li. 15-27 [doi]
- Empirical Observations about Profile-Guided Optimizations for Mainstream C/C++ CompilersSoma Pal, Prasad Anil Kulkarni. 28-42 [doi]
- DeduBB: Binary Code Size Reduction via Post-Link Basic Block DeduplicationChaitanya Mamatha Ananda, Mahbod Afarin, Rajiv Gupta 0001, Sriraman Tallam, Han Shen, Xinliang David Li. 43-56 [doi]
- SymFlow: Event-Chain-Aware Symbolic Execution for Serverless Sensitive Data Flow DetectionYuanpeng Wang, Zhineng Zhong, Zhenkai Liang, Ding Li, Yao Guo 0001, Xiangqun Chen. 57-69 [doi]
- CVS: A Metric for Security-Aware Compilation against Side-Channel Attacks in Edge SoCs (WIP)Yi Han, Puhong Lei, Yang Shi, Zhe Li 0017, Xing Mou, Jianjun Chen, Yaohua Wang. 70-74 [doi]
- A Programming Model for Efficient Inter-Kernel Control-Flow on Memory-Mapped Near-Data Processing Architecture (WIP)Seungheon Lee, Wonhyuk Yang, Seonyeong Heo, Gwangsun Kim. 75-79 [doi]
- FLUX: Frequency Scaling with Layer-wise Utilization for Energy-Efficient NPU Execution (WIP)Inho Lee 0002, Ky Yeop Lim, Hyejun Kim, BeomSeok Kim, Dongsuk Jeon, Hunjun Lee, Yongjun Park 0001. 80-84 [doi]
- Towards Verifiable System Code using a DSL Compiled to Efficient and Readable C CodeClément Chavanon, Henrik A. Karlsson, Frédéric Besson, Sandrine Blazy, Roberto Guanciale. 85-96 [doi]
- A Pointer-Ownership Model for C Inspired by RustDavid Svoboda, William Klieber, Lori Flynn, Ruben Martins, Jeffrey Hoskinson. 97-111 [doi]
- Hikami: A Lightweight Hypervisor for Emulating RISC-V Extension Semantics with Sail-Driven Auto-generationNorimasa Takana, Yoshihiro Oyama. 112-123 [doi]
- Scheduled Partial-Credit RL for Reliable Code Generation with Small Language Models (WIP)Suryansh Singh Sijwali, Suman Saha. 124-128 [doi]
- Can Fine-Grain Multi-threading Subsume VLIW?Scott Pomerville, Soner Önder, Gang-Ryung Uh, David B. Whalley. 129-141 [doi]
- Sirop: A Small IR for HLS with Parallel PatternsLouis Hildebrand, Christophe Dubach. 142-155 [doi]
- A Functional Approach to Synthesizing Routable Programmable Accelerators for Neural NetworksTzung-Han Juang, Paul Teng, Christophe Dubach. 156-168 [doi]
- LoopHint: A Compiler-Assisted Loop Branch Predictor for Embedded DSPsYuanyang Xiang, Chen Xu, Ruozhou Xiao, Zhiwei Zhang. 169-179 [doi]
- MemSpec: Memory-Aware Runtime for Adaptive Draft Scheduling in Speculative Decoding on Edge DevicesEunjeong Kim, Yeong Jun Jeon, Myeonggyun Han. 180-192 [doi]
- Bridging the Memory Hotness Gap in Edge Systems with Hotness-Segregated Object AllocationRuizhe Huang, Jiahua Wang, Qihang Xu, Peng Jiang, Zhida An, Ding Li, Yao Guo, Xiangqun Chen, Yuxin Ren 0001, Ning Jia 0004. 193-206 [doi]
- On the Origins of Indirect Jumps in Embedded SoftwareAriane Nicolas, Ronan Lashermes, Isabelle Puaut, Erven Rohou. 207-220 [doi]