Table of Contents

• A Bit Cycling Method for Improving the DNL/INL in Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC)Hua Fan, Chen Wang, Hailiang Xiong, Quanyuan Feng, Dagang Li, Kelin Zhang, Xiaopeng Diao, Lishuang Lin, Hadi Heidari. 1-4 [doi]
• Variable Transconductance Voltage Differencing Current Conveyor and its Application in Filter DesignSuyash Kumar, Gunit Dhingra, Pragati Kumar. 5-8 [doi]
• Versatile SAR-ADC for Biomedical ApplicationsJ. Sotiere, Mehdi Terosiet, Edwin De Roux, Alejandro Von Chong, F. Kolbl, Aymeric Histace, Olivier Romain. 9-12 [doi]
• Impact of the Spread-Spectrum Technique on the Higher-Order Harmonics and Radiated Emissions of a Synchronous Buck ConverterRaul Blecic, Josip Bacmaga, Adrijan Baric, Fabio Pareschi, Riccardo Rovatti, Gianluca Setti. 13-16 [doi]
• Photodiode Bridge-Based Differential Readout Circuit for High-Sensitivity Measurements of Energy Variations of Laser Pulses for Optoelectronic Sensing SystemsAndrea De Marcellis, Elia Palange, Simona Leone, Guido Di Patrizio Stanchieri, Marco Faccio. 17-20 [doi]
• Correlating Power Efficiency and Lifetime to Programming Strategies in RRAM-Based FPGAsCristian Zambelli, Marco Castellari, Piero Olivo, Davide Bertozzi. 21-24 [doi]
• Efficient Implementation of Bi-Functional RTL Components - Case StudyJan Nevoral, Richard Ruzicka. 25-28 [doi]
• Smart Ultrasound Sensor for Non-Destructive TestsRiccardo Matera, Valentino Meacci, S. Rossi, D. Russo, S. Ricci, D. Lootcns. 29-32 [doi]
• Profile Generator for Ultrasound Doppler SystemsDario Russo, Valentino Meacci, Stefano Ricci. 33-36 [doi]
• Comprehensive Comparison of NULL Convention Logic Threshold Gate ImplementationsKelby Haulmark, Wassim Khalil, William Bouillon, Jia Di. 37-40 [doi]
• Torque-Oriented Stepper Motor Control in FPGAValentino Meacci, Riccardo Matera, D. Russo, Stefano Ricci. 41-44 [doi]
• A New FPGA-Based Controller Card for the Optimisation of the Front-End Readout Electronics of Charged-Particle Veto Detector at ALICEClive Seguna, Edward Gatt, Jordan Lee Gauci, Giacinto De Cataldo, Ivan Grech, Owen Casha. 45-48 [doi]
• Low Area and Low Power Implementation for CAESAR Authenticated CiphersAmr Abbas, Hassan Mostafa, Ahmed Nader Mohieldin. 49-52 [doi]
• A Fixed-Point Natural Logarithm Approximation Hardware Design Using Taylor SeriesMiguel R. Weirich, Guilherme Paim, Eduardo A. C. da Costa, Sergio Bampi. 53-56 [doi]
• Real-Time Lane Detection-Based Line Segment DetectionAhmed Mahmoud, Loay Ehab, Mohamed Reda, Mostafa Abdelaleem, Hossam Abd El Munim, Maged Ghoneima, M. Saeed Darweesh, Hassan Mostafa. 57-61 [doi]
• Design of an STM32F4 Microcontroller Development Board for Switching Power ConvertersW. Agius, Kris Scicluna, J. Zammit, Clive Seguna, Jeremy Scerri. 62-65 [doi]
• AppropinQuo: A Platform Emulator for Exploring the Approximate Memory Design SpaceGiulia Stazi, Antonio Mastrandrea, Mauro Olivieri, Francesco Menichelli. 66-69 [doi]
• Power Optimization of a 0.5V 0.286-to-18MHz ADPLL in 65nm CMOS ProcessFredrick Angelo R. Galapon, Mark Allen D. C. Agaton, Arcel G. Leynes, Lemuel Neil M. Noveno, Anastacia B. Alvarez, Chris Vincent J. Densing, John Richard E. Hizon, Marc D. Rosales, Maria Theresa G. de Leon, Rico Jossel M. Maestro. 70-73 [doi]
• Characterization of Digital IC for Sub-Nanosecond Dead-Time Adjustment Used in Synchronous DC-DC ConvertersJosip Bacmaga, Raul Blecic, Roger Voaden, Adrijan Baric. 74-77 [doi]
• Projected-Gradient-Descent in Rakeness-Based Compressed Sensing with Disturbance RejectionMauro Mangia, Letizia Magenta, Alex Marchioni, Fablo Paresch, Riccardo Rovatti, Gianluca Setti. 78-81 [doi]
• On the Optimization of DT Incremental Sigma-Delta Modulators in Combination with CoI Reconstruction FiltersJohannes Wagner 0003, Patrick Vogelmann, Maurits Ortmanns. 82-85 [doi]
• Task Allocation and Scheduling Optimization in the Heterogeneous Core SystemRyota Tsuchihashi, Komei Nomura, Yasuhiro Takashima, Yuichi Nakamura. 86-89 [doi]
• Automated Synthesis of Subsampling CT Bandpass ΣΔ Modulators with Non-IdealitiesJohannes Wagner 0003, Felix Vogel, Florian Kuhm, Maurits Ortmanns. 90-93 [doi]
• Fast Approximate Algorithm for the Single Source Shortest Path with Lazy UpdateTomohiro Takahashi, Yasuhiro Takashima. 94-97 [doi]
• Random Number Generator Based on Fuel CellsCelal Erbay, Salih Ergun. 98-101 [doi]
• Hardware Implementation of Bio-Inspired ModelsZdenek Kolka, Viera Biolková, Dalibor Biolek, Zdenek Biolek. 102-105 [doi]
• Analytical Modeling of Continuous-Time Chaos Based Random Number GeneratorsKaya Demir, Salih Ergun. 106-109 [doi]
• Wearable System for Sensory Substitution for ProstheticsMoustafa Saleh, Ali Ibrahim, Flavio Ansovini, Yasser Mohanna, Maurizio Valle. 110-113 [doi]
• Diagonal Mode: A New Mode for Triboelectric Anogenerators Energy HarvestersReem Abd Ei-Sttar, Endy Onsy, George S. Maximous, Ahmed Zaky, Tamer A. Ali, Ashraf Seleym, Hassan Mostafa. 114-117 [doi]
• Characterization and Equivalent Circuit Model of 500-MHz Two-Port Electromagnetic Resonant Couplers for Isolated Gate DriversRaul Blecic, Josip Bacmaga, Adrijan Baric. 118-121 [doi]
• Sensorless Position Trackingi in Steer-by-Wire Using the SONIC MethodKris Scicluna, Cyril Spiteri Staines, Reiko Raute. 122-125 [doi]
• Development of a New Low-Cost EMG Monitoring System for the Classification of Finger MovementClive Seguna, Adrian von Brockdorff, Jeremy Scerri, Kris Scicluna. 126-129 [doi]
• A Compact Low-Power Mitchell-Based Error Tolerant MultiplierAly Sultan, Ali H. Hassan, Hassan Mostafa. 130-133 [doi]
• Power System Frequency Estimation U Sing the Kernel Least Mean Square Algorithm and the Clarke TransformMaicon Robe Ferreira, Sérgio Jose Melo de Almeida, Eduardo Antonio Cesar da Costa. 134-137 [doi]
• Hierarchical Floorplanning Based on Analog Structure TreeChao Geng, Shigetoshi Nakatake. 138-141 [doi]
• Analog Retargeting Constraint Extraction Based on Fundamental Circuits and Layout RegularityXuncheng Zou, Shigetoshi Nakatake. 142-145 [doi]
• A Transient Noise Analysis of Secured Dual-Rail Based Logic StyleKashif Nawaz, Itamar Levi, François-Xavier Standaert, Denis Flandre. 146-149 [doi]
• High-Resolution ADCs for Biomedical Imaging SystemsHua Fan, Xinjie Wu, Tao Zhang, Quanyuan Feng, Lang Feng, Dagang Li, Kelin Zhang, Daqian Hu, Yuanjun Cen, Hadi Heidari. 150-153 [doi]
• Texture Super-Resolution in Multiview RGB-D TransmissionJulia Farrugia, Carl James Debono. 154-157 [doi]
• A Software Defined Radio Transceiver Based on Dynamic Partial ReconfigurationSherif Hosny, Eslam Elnader, Mostafa Gamal, Abdelrhman Hussien, Ahmed H. Khalil, Hassan Mostafa. 158-161 [doi]
• A Mixer-1st Auxiliary Receiver for Full-Duplex Self-Interference CancellationD. Prevcdelli, G. Pini, Danilo Manstretta, Rinaldo Castello. 162-165 [doi]
• A 20-60GHz Digitally Controlled Composite Oscillator for 5GYury Antonov, Markus Tormanen, Jussi Ryynänen, Aarno Pärssinen, Kari Stadius. 166-169 [doi]
• Implementation of a C-V2X Receiver on an Over-the-Air Software-Defined-Radio Platform with OpenCLMing-Hsuan Lai, Tzi-Dar Chiueh. 170-173 [doi]
• Modeling of a Re-Configurable Indoor Positioning System Based on Software Defined Radio ArchitectureGiovanni Piccinni, Gianfranco Avitabile, Giuseppe Coviello, Claudio Talarico. 174-177 [doi]
• Constructing Effective UVM Testbench for DRAM Memory ControllersKhaled Salah, Hassan Mostafa. 178-181 [doi]
• 2n RRR: Improved Stochastic Number Duplicator Based on Bit Re-ArrangementRyota Ishikawa, Masashi Tawada, Masao Yanagisawa, Nozomu Togawa. 182-185 [doi]
• Design and Performance of Virtually Nonvolatile Retention Flip-Flop Using Dual-Mode InvertersDaiki Kitagata, Shuu'ichirou Yamamoto, Satoshi Sugahara. 186-189 [doi]
• Approximate-Computing Architectures for Motion Estimation in HEVCAlberto Paltrinieri, Riccardo Peloso, Guido Masera, Muhammad Shafique 0001, Maurizio Martina. 190-193 [doi]
• Robust Functional Verification Framework Based in UVM Applied to an AES Encryption ModuleFrank Plasencia-Balabarca, Edward Mitacc-Meza, Mario Raffo-Jara, Carlos Silva Cárdenas. 194-197 [doi]