Abstract is missing.
- Efficient communication in heterogeneous SoCs with unified address spaceOthon Tomoutzoglou, Dimitrios Bakoyiannis, George Komaros, Marcello Coppola. 1-6 [doi]
- Postponing wearout failures in chip multiprocessors using thermal management and thread migrationElham Kashefi, Hamid R. Zarandi, Ann Gordon-Ross. 1-7 [doi]
- Verifying worst-case completion times for reconfigurable hardware modules using proof-carrying hardwareTobias Wiersema, Marco Platzner. 1-8 [doi]
- A programmable and reconfigurable core for binary image processingAyad Dalloo, Alberto García Ortiz. 1-6 [doi]
- The selector-tree network: A new self-routing and non-blocking interconnection networkTripti Jain, Klaus Schneider 0001, Anoop Bhagyanath. 1-8 [doi]
- Efficient bandwidth regulation at memory controller for mixed criticality applicationsGeorge Tsamis, Stamatios Kavvadias, Antonis Papagrigoriou, Miltos D. Grammatikakis, Kyprianos Papadimitriou. 1-8 [doi]
- Reconfiguration in FPGA-based multi-core platforms for hard real-time applicationsLuca Pezzarossa, Martin Schoeberl, Jens Sparsø. 1-8 [doi]
- A simulation environment for design space exploration for asymmetric 3D-Network-on-ChipJan Moritz Joseph, Sven Wrieden, Christopher Blochwitz, Alberto Garcia-Oritz, Thilo Pionteck. 1-8 [doi]
- EXTRA: Towards the exploitation of eXascale technology for reconfigurable architecturesDirk Stroobandt, Ana Lucia Varbanescu, Catalin Bogdan Ciobanu, Muhammed Al Kadi, Andreas Brokalakis, George Charitopoulos, Tim Todman, Xinyu Niu, Dionisios N. Pnevmatikatos, Amit Kulkarni, Elias Vansteenkiste, Wayne Luk, Marco D. Santambrogio, Donatella Sciuto, Michael Hübner, Tobias Becker, Georgi Gaydadjiev, Antonis Nikitakis, Alex J. W. Thom. 1-7 [doi]
- Speed and accuracy dilemma in NoC simulation: What about memory impact?Manuel Selva, Abdoulaye Gamatié, David Novo, Gilles Sassatelli. 1-7 [doi]
- Analysis of radiation-induced SEUs on dynamic reconfigurable systemsLuca Sterpone, Luca Boragno, David Merodio Codinachs. 1-6 [doi]
- Dynamic spatially isolated secure zones for NoC-based many-core acceleratorsMaria Mendez Real, Philipp Wehner, Vincent Migliore, Vianney Lapotre, Diana Göhringer, Guy Gogniat. 1-6 [doi]
- An ultra-low energy PUF matching security platform using programmable delay linesTeng Xu 0001, Hongxiang Gu, Miodrag Potkonjak. 1-8 [doi]
- 2: A framework for dependable task deployment on many-core systems under mixed-criticality constraintsSiavoosh Payandeh Azad, Behrad Niazmand, Peeter Ellervee, Jaan Raik, Gert Jervan, Thomas Hollstein. 1-6 [doi]
- A programming model for reconfigurable computing based in functional concurrencyWilliam L. Harrison, Ian Graves, Adam M. Procter, Michela Becchi, Gerard Allwein. 1-8 [doi]
- Towards risk aware NoCs for data protection in MPSoCsJohanna Sepúlveda, Daniel Florez, Ramon Fernandes, César A. M. Marcon, Guy Gogniat, Georg Sigl. 1-8 [doi]
- Comparative analysis of flexible cryptographic implementationsMuhammad Rashid, Malik Imran, Atif Raza Jafri. 1-6 [doi]
- ERRCA: A buffer-efficient reconfigurable optical Network-on-Chip with permanent-error recognitionWolfgang Buter, Dominic Oehlert, Alberto García Ortiz. 1-6 [doi]
- Address interleaving for low-cost NoCsMiltos D. Grammatikakis, Kyprianos Papadimitriou, Polydoros Petrakis, Marcello Coppola, Michael Soulie. 1-8 [doi]
- Programming models for reconfigurable manycore systemsDavid Andrews, Marco Platzner. 1-8 [doi]
- Online reconfigurable routing method for handling link failures in NoC-based MPSoCsPoona Bahrebar, Dirk Stroobandt. 1-8 [doi]