Abstract is missing.
- Dynamic Partitioned Scheduling of Real-Time DAG Tasks on ARM big.LITTLE ArchitecturesAgostino Mascitti, Tommaso Cucinotta. 1-11 [doi]
- Heterogeneous multicore SDRAM interference analysisAlfonso Mascareñas González, Frédéric Boniol, Youcef Bouchebaba, Jean-Loup Bussenot, Jean-Baptiste Chaudron. 12-23 [doi]
- Exploring AMD GPU Scheduling Details by Experimenting With "Worst Practices"Nathan Otterness, James H. Anderson. 24-34 [doi]
- Towards Virtualization-Agnostic Latency for Time-Sensitive ApplicationsHaoran Li, Meng Xu, Chong Li, Chenyang Lu 0001, Christopher D. Gill, Linh T. X. Phan, Insup Lee, Oleg Sokolsky. 35-45 [doi]
- On the Defectiveness of SCHED_DEADLINE w.r.t. Tardiness and Affinities, and a Partial FixStephen Tang, James H. Anderson, Luca Abeni. 46-56 [doi]
- Formal Verification of a Mixed-Trust Synchronization ProtocolRuben Martins, Michael McCall, Dionisio de Niz, Amit Vasudevan, Björn Andersson, Mark Klein, John P. Lehoczky, Hyoseung Kim. 57-67 [doi]
- Synthesising Schedules to Improve QoS of Best-effort Traffic in TSN NetworksBahar Houtan, Mohammad Ashjaei, Masoud Daneshtalab, Mikael Sjödin, Saad Mubeen. 68-77 [doi]
- A model-based approach for analysing network communication timeliness in IMA systems at concept levelRodrigo Saar de Moraes, Simona Bernardi 0001, Simin Nadjm-Tehrani. 78-88 [doi]
- Improvements to Deep-Learning-based Feasibility Prediction of Switched Ethernet Network ConfigurationsTieu Long Mai, Nicolas Navet. 89-99 [doi]
- How to Optimize Joint Routing and Scheduling Models for TSN Using Integer Linear ProgrammingDavid Hellmanns, Lucas Haug, Moritz Hildebrand, Frank Dürr, Stephan Kehrer, René Hummen. 100-111 [doi]
- Data Cache Analysis by Counting Integer PointsPascal Sotin, Quentin Vermande, Hugues Cassé. 112-122 [doi]
- Bus-Contention Aware Schedulability Analysis for the 3-Phase Task Model with Partitioned SchedulingJatin Arora 0006, Cláudio Maia, Syed Aftab Rashid, Geoffrey Nelissen, Eduardo Tovar. 123-133 [doi]
- Precise Scheduling of Mixed-Criticality Tasks on Varying-Speed MultiprocessorsTianning She, Sudharsan Vaidhun, Qijun Gu, Sajal K. Das, Zhishan Guo, Kecheng Yang 0001. 134-143 [doi]
- An Efficient Proactive Thermal-Aware Scheduler for DVFS-enabled Single-Core ProcessorsJavier Pérez-Rodríguez, Patrick Meumeu Yomsi. 144-154 [doi]
- Migrating Constant Bandwidth Servers on Multi-CoresTommaso Cucinotta, Luca Abeni. 155-164 [doi]
- Feasibility Analysis of Conditional DAG Tasks is co-NPNP-HardSanjoy Baruah. 165-172 [doi]
- Response Time Analysis of Parallel Real-Time DAG Tasks Scheduled by Thread PoolsMichael Schmid, Jürgen Mottok. 173-183 [doi]
- Optimal Synthesis of IDK-CascadesSanjoy K. Baruah, Alan Burns, Yue Wu. 184-191 [doi]
- Timely and Non-Disruptive Response of Emergency Vehicles: A Real-Time ApproachPratham Oza, Thidapat Chantem. 192-203 [doi]
- Crumbs: Utilizing Functional Programming for Hardware Trace Data AnalysisMax Brand, Albrecht Mayer, Frank Slomka. 204-215 [doi]
- Formal schedulability analysis based on multi-core RTOS modelImane Haur, Jean-Luc Béchennec, Olivier Henri Roux. 216-225 [doi]
- Contention-Aware GPU Partitioning and Task-to-Partition Allocation for Real-Time WorkloadsHoussam-Eddine Zahaf, Ignacio Sanudo Sanudo Olmedo, Jayati Singh, Nicola Capodieci, Sébastien Faucou. 226-236 [doi]