Abstract is missing.
- Evaluation of Different Processor Architecture Organizations for On-site Electronics in Harsh EnvironmentsSven Gesper, Moritz Weißbrich, Stephan Nolting, Tobias Stuckenberg, Pekka Jääskeläinen, Holger Blume, Guillermo Payá Vayá. 3-17 [doi]
- CoD: Coherence-on-Demand - Runtime Adaptable Working Set Coherence for DSM-Based Manycore ArchitecturesAkshay Srivatsa, Sven Rheindt, Dirk Gabriel, Thomas Wild, Andreas Herkersdorf. 18-33 [doi]
- RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAMDeepak M. Mathew, André Lucas Chinazzo, Christian Weis, Matthias Jung 0001, Bastien Giraud, Pascal Vivet, Alexandre Levisse, Norbert Wehn. 34-47 [doi]
- Efficient Dynamic Device Placement for Deep Neural Network Training on Heterogeneous SystemsZi Xuan Huang, Shen Yu Fu, Wei-Chung Hsu. 51-64 [doi]
- Skipping CNN Convolutions Through Efficient MemoizationRafael Fão de Moura, Paulo C. Santos, João Paulo C. de Lima, Marco Antonio Zanata Alves, Antonio C. S. Beck, Luigi Carro. 65-76 [doi]
- Fully Distributed Deep Learning Inference on Resource-Constrained Edge DevicesRafael Stahl, Zhuoran Zhao, Daniel Mueller-Gritschneder, Andreas Gerstlauer, Ulf Schlichtmann. 77-90 [doi]
- A Latency-Optimized Hash-Based Digital Signature Accelerator for the Tactile InternetFriedrich Pauls, Robert Wittig, Gerhard P. Fettweis. 93-106 [doi]
- Fault Sensitivity Analysis of Lattice-Based Post-Quantum Cryptographic ComponentsFelipe Valencia, Ilia Polian, Francesco Regazzoni. 107-123 [doi]
- Scalable Optimal Greedy Scheduler for Asymmetric Multi-/Many-Core ProcessorsVanchinathan Venkataramani, Anuj Pathania, Tulika Mitra. 127-141 [doi]
- Platform-Agnostic Learning-Based SchedulingAndreas Prodromou, Ashish Venkat, Dean M. Tullsen. 142-154 [doi]
- Using Frame Similarity for Low Energy Software-Only IoT Video RecognitionLarissa Rozales Gonçalves, Lucas Klein Draghetti, Paolo Rech, Luigi Carro. 157-168 [doi]
- Design and Optimization of an ARM Cortex-M Based SoC for TCP/IP Communication in High Temperature ApplicationsTobias Stuckenberg, M. Gottschlich, Stephan Nolting, Holger Blume. 169-183 [doi]
- An Open-Hardware Platform for MPSoC Thermal ModelingFederico Terraneo, Alberto Leva, William Fornaciari. 184-196 [doi]
- PIMP My Many-Core: Pipeline-Integrated Message PassingJörg Mische, Martin Frieb, Alexander Stegmeier, Theo Ungerer. 199-211 [doi]
- SHARQ: Software-Defined Hardware-Managed Queues for Tile-Based Manycore ArchitecturesSven Rheindt, Sebastian Maier, Florian Schmaus, Thomas Wild, Wolfgang Schröder-Preikschat, Andreas Herkersdorf. 212-225 [doi]
- Access Interval Prediction for Tightly Coupled Memory SystemsRobert Wittig, Friedrich Pauls, Emil Matús, Gerhard P. Fettweis. 229-240 [doi]
- Experimental Evaluation of Probabilistic Execution-Time Modeling and Analysis Methods for SDF Applications on MPSoCsRalf Stemmer, Hai-Dang Vu, Kim Grüttner, Sébastien LeNours, Wolfgang Nebel, Sébastien Pillement. 241-254 [doi]
- Software Passports for Automated Performance Anomaly Detection of Cyber-Physical SystemsUraz Odyurt, Hugo Meyer, Andy D. Pimentel, Evangelos Paradas, Ignacio Gonzalez Alonso. 255-268 [doi]
- Modeling Nested for Loops with Explicit Parallelism in Synchronous DataFlow GraphsAlexandre Honorat, Karol Desnos, Maxime Pelcat, Jean-François Nezan. 269-280 [doi]
- System-Level Modeling and Simulation of MPSoC Run-Time Management Using Execution Traces AnalysisS. Yang, Sébastien LeNours, Maria Mendez Real, Sébastien Pillement. 281-293 [doi]
- GEMBench: A Platform for Collaborative Development of GPU Accelerated Embedded Markov Decision SystemsAdrian E. Sapio, Rocky L. Tatiefo, Shuvra S. Bhattacharyya, Marilyn Wolf. 294-308 [doi]
- Hardware Deceleration of Kvazaar HEVC EncoderJoose Sainio, Alexandre Mercat, Jarno Vanne. 311-324 [doi]
- On Compact Mappings for Multicore SystemsAndrés Goens, Christian Menard, Jerónimo Castrillón. 325-335 [doi]
- The CAPH Language, Ten Years AfterJocelyn Sérot, François Berry. 336-347 [doi]
- Comparison of Exponentially Decreasing Vs. Polynomially Decreasing Objective Functions for Making Quantum Circuits Nearest Neighbour CompliantLeo Rogers, John McAllister. 348-357 [doi]
- Transport Triggered Array Processor for Vision ApplicationsMehdi Safarpour, Ilkka Hautala, Miguel Bordallo López, Olli Silvén. 361-372 [doi]
- Approximate Similarity Search with FAISS Framework Using FPGAs on the CloudDimitrios Danopoulos, Christoforos Kachris, Dimitrios Soudris. 373-386 [doi]
- Automatic Memory-Efficient Scheduling of CNNsLuc Waeijen, Savvas Sioutas, Yifan He, Maurice Peemen, Henk Corporaal. 387-400 [doi]
- Low Precision Processing for High Order Stencil ComputationsGagandeep Singh, Dionysios Diamantopoulos, Sander Stuijk, Christoph Hagleitner, Henk Corporaal. 403-415 [doi]
- Hardware/Software Self-adaptation in CPS: The CERBERO Project ApproachFrancesca Palumbo, Tiziana Fanni, Carlo Sau, Alfonso Rodriguez, Daniel Madroñal, Karol Desnos, Antoine Morvan, Maxime Pelcat, Claudio Rubattu, Raquel Lazcano, Luigi Raffo, Eduardo de la Torre, Eduardo Juárez, César Sanz, Pablo Sanchez de Rojas. 416-428 [doi]
- A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision ComputingChirag Sudarshan, Jan Lappas, Christian Weis, Deepak M. Mathew, Matthias Jung 0001, Norbert Wehn. 429-441 [doi]
- Optimized FPGA Implementation of a Compute-Intensive Oil Reservoir Simulation AlgorithmAggelos D. Ioannou, Pavlos Malakonakis, Konstantinos Georgopoulos, Ioannis Papaefstathiou, Apostolos Dollas, Iakovos Mavroidis. 442-454 [doi]
- Accelerating Automotive Analytics: The M2DC Appliance ApproachGiovanni Agosta, Carlo Brandolese, William Fornaciari, Nicholas Mainardi, Gerardo Pelosi, Federico Reghenzani, Michele Zanella, Gaetan Des Courchamps, Vincent Ducrot, Kevin Juilly, Sébastien Monot, Luca Ceva. 455-469 [doi]
- Predictive Resource Management for Next-Generation High-Performance Computing Heterogeneous PlatformsGiuseppe Massari, Anna Pupykina, Giovanni Agosta, William Fornaciari. 470-483 [doi]