Table of Contents

• Efficient Handover Mode Synchronization for NR-REDCAP on a Vector DSPSheikh Faizan Qureshi, Stefan A. Damjancevic, Emil Matús, Dmitry Utyansky, Pieter van der Wolf, Gerhard P. Fettweis. 3-18 [doi]
• Fault Detection Mechanisms for COTS FPGA Systems Used in Low Earth OrbitTim Oberschulte, Jakob Marten, Holger Blume. 19-32 [doi]
• NTHPC: Embracing Near-Threshold Operation for High Performance Multi-core SystemsShounak Chakraborty, Mehdi Safarpour, Olli Silvén. 33-42 [doi]
• Closing the Capacity Gap: A Transforming Technique for ReRAM-Friendly NNsRafael Fão de Moura, Luigi Carro. 45-56 [doi]
• Myrmec: FPGA-Accelerated SmartNIC for Cost and Power Efficient IoT Sensor NetworksJeffrey Chen, Sang-Woo Jun. 57-71 [doi]
• Exploring Multi-core Systems with Lifetime Reliability and Power Consumption Trade-offsDolly Sapra, Andy D. Pimentel. 72-87 [doi]
• Characterization of a Coherent Hardware Accelerator Framework for SoCsGuillem López-Paradís, Balaji Venu, Adrià Armejach, Miquel Moretó. 91-106 [doi]
• DAEBI: A Tool for Data Flow and Architecture Explorations of Binary Neural Network AcceleratorsMikail Yayla, Cecilia Latotzke, Robert Huber, Somar Iskif, Tobias Gemmeke, Jian-Jia Chen. 107-122 [doi]
• An Intelligent Image Processing System for Enhancing Blood Vessel Segmentation on Low-Power SoCMajed Alsharari, Son T. Mai, Romain Garnier, Carlos Reaño, Roger F. Woods. 123-138 [doi]
• Micro-architecture and Control Electronics Simulation of Modular Color Center-Based Quantum ComputersFolkert de Ronde, Matti Dreef, Stephan Wong, David Elkouss. 141-157 [doi]
• From Algorithm to Implementation: Enabling High-Throughput CNN-Based Equalization on FPGA for Optical CommunicationsJonas Ney, Christoph Füllner, Vincent Lauinger, Laurent Schmalen, Sebastian Randel, Norbert Wehn. 158-173 [doi]
• parti-gem5: gem5's Timing Mode ParallelisedJosé Cubero-Cascante, Niko Zurstraßen, Jörn Nöller, Rainer Leupers, Jan Moritz Joseph. 177-192 [doi]
• Reliable Basic Block Energy AccountingChristos P. Lamprakos, Dimitrios S. Bouras, Francky Catthoor, Dimitrios Soudris. 193-208 [doi]
• RattlesnakeJake: A Fast and Accurate Pre-alignment Filter Suitable for Computation-in-MemoryTaha Shahroodi, Michael Miao, Mahdi Zahedi, Stephan Wong, Said Hamdioui. 209-221 [doi]
• PATARA: Extension of a Verification Framework for RISC-V Instruction Set ImplementationsSven Gesper, Fabian Stuckmann, Lucy Wöbbekind, Guillermo Payá Vayá. 225-240 [doi]
• Fast Shared-Memory Barrier Synchronization for a 1024-Cores RISC-V Many-Core ClusterMarco Bertuletti, Samuel Riedel, Yichao Zhang, Alessandro Vanelli-Coralli, Luca Benini. 241-254 [doi]
• High Performance Instruction Fetch Structure within a RISC-V Processor for Use in Harsh EnvironmentsMalte Hawich, Nico Rumpeltin, Malte Rücker, Tobias Stuckenberg, Holger Blume. 255-268 [doi]
• Unlocking the Potential of RISC-V Heterogeneous MPSoC: A PANACA-Based Approach to Simulation and ModelingJulian Haase, Muhammad Ali 0010, Diana Göhringer. 269-282 [doi]
• $\mathrm {DD\text {-}MPU}$: Dynamic and Distributed Memory Protection Unit for Embedded System-on-ChipsCarsten Heinz, Andreas Koch 0001. 285-295 [doi]
• Trust-Based Adaptive Routing for NoCsElke Franz 0001, Anita Grützner. 296-310 [doi]
• Run-Time Detection of Malicious Behavior Based on Exploit Decomposition Using Deep Learning: A Feasibility Study on SysJokerThanasis Tsakoulis, Evangelos Haleplidis, Apostolos P. Fournaris. 311-327 [doi]
• A Survey of Software Implementations for the Number Theoretic TransformAhmet Can Mert, Ferhat Yaman, Emre Karabulut, Erdinç Öztürk, Erkay Savas, Aydin Aysu. 328-344 [doi]
• METASAT: Modular Model-Based Design and Testing for Applications in SatellitesLeonidas Kosmidis, Alejandro J. Calderón, Aridane Álvarez Suárez, Stefano Sinisi, Eckart Göhler, Paco Gómez Molinero, Alfred Hönle, Alvaro Jover-Alvarez, Lorenzo Lazzara, Miguel Masmano Tello, Peio Onaindia, Tomaso Poggi, Ivan Rodriguez-Ferrandez, Marc Solé Bonet, Giulia Stazi, Matina Maria Trompouki, Alessandro Ulisse, Valerio Di Valerio, Jannis Wolf, Irune Yarza. 347-362 [doi]
• RISC-V Processor Technologies for Aerospace Applications in the ISOLDE ProjectWilliam Fornaciari, Federico Reghenzani, Giovanni Agosta, Davide Zoni, Andrea Galimberti, Francesco Conti 0001, Yvan Tortorella, Emanuele Parisi, Francesco Barchi, Andrea Bartolini, Andrea Acquaviva, Daniele Gregori, Salvatore Cognetta, Carlo Ciancarelli, Antonio Leboffe, Paolo Serri, Alessio Burrello, Daniele Jahier Pagliari, Gianvito Urgese, Maurizio Martina, Guido Masera, Rosario Di Carlo, Antonio Sciarappa. 363-378 [doi]
• Towards Privacy-First Security Enablers for 6G Networks: The PRIVATEER ApproachDimosthenis Masouros, Dimitrios Soudris, Georgios Gardikis, Victoria Katsarou, Maria Christopoulou, George Xilouris, Hugo Ramón, Antonio Pastor 0001, Fabrizio Scaglione, Cristian Petrollini, António Pinto, João P. Vilela, Antonia Karamatskou, Nikolaos Papadakis, Anna Angelogianni, Thanassis Giannetsos, Luis Javier García-Villalba, Jesús A. Alonso-López, Martin Strand, Gudmund Grov, Anastasios N. Bikos, Kostas Ramantas, Ricardo Santos 0001, Fábio Silva, Nikolaos Tsampieris. 379-391 [doi]
• RISC-V-Based Platforms for HPC: Analyzing Non-functional Properties for Future HPC and Big-Data ClustersWilliam Fornaciari, Federico Reghenzani, Federico Terraneo, Davide Baroffio, Cecilia Metra, Martin Omaña 0001, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Robert Birke, Iacopo Colonnelli, Gianluca Mittone, Marco Aldinucci, Gabriele Mencagli, Francesco Iannone, Filippo Palombi, Giuseppe Zummo, Daniele Cesarini, Federico Tesser. 395-410 [doi]
• Enabling an Isolated and Energy-Aware Deployment of Computationally Intensive Kernels on Multi-tenant EnvironmentsArgyris Kokkinis, Anastassios Nanos, Kostas Siozios. 411-422 [doi]
• Quantum Computing Research Lines in the Italian Center for SupercomputingAlessandro Barenghi, Paolo Cremonesi, Gerardo Pelosi. 423-434 [doi]
• Devices and Architectures for Efficient Computing In-Memory (CIM) DesignChristopher Bengel, Anteneh Gebregiorgis, Stephan Menzel, Rainer Waser, Georgi Gaydadjiev, Said Hamdioui. 437-450 [doi]
• A Case for Genome Analysis Where Genomes ResideTaha Shahroodi, Stephan Wong, Said Hamdioui. 453-458 [doi]
• ELAION: ML-Based System for Olive Classification with Edge DevicesDimitris Theodoropoulos, Konstantinos Blazakis, Dionisios N. Pnevmatikatos, Panagiotis Kalaitzis. 459-464 [doi]
• Energy-Efficient BLAS L1 Routines for FPGA-Supported HPC ApplicationsDimitris Theodoropoulos, Giorgos Pekridis, Panagiotis Miliadis, Dionisios N. Pnevmatikatos. 465-468 [doi]
• Mixed Precision in Heterogeneous Parallel Computing Platforms via Delayed Code AnalysisDaniele Cattaneo 0002, Alberto Maggioli, Gabriele Magnani, Lev Denisov, Shufan Yang, Giovanni Agosta, Stefano Cherubin. 469-477 [doi]
• On-Chip Memory Access Reduction for Energy-Efficient Dilated Convolution ProcessingSimon Friedrich, Thomas Nalapat, Robert Wittig, Emil Matús, Gerhard P. Fettweis. 478-485 [doi]
• TrueFloat: A Templatized Arithmetic Library for HLS Floating-Point OperatorsMichele Fiorito, Serena Curzel, Fabrizio Ferrandi. 486-493 [doi]
• VULDAT: Automated Vulnerability Detection from Cyberattack TextRefat Othman, Barbara Russo. 494-501 [doi]