Abstract is missing.
- Adaptive Systems-on-Chip: Architectures, Technologies and ApplicationsJürgen Becker 0001, Thilo Pionteck, Manfred Glesner. 2-7 [doi]
- System-Level Object-Orientation in the Specification and Validation of Embedded SystemsJoão M. Fernandes, Ricardo J. Machado. 8-13 [doi]
- Communication Architectures for System-on-ChipMárcio Eduardo Kreutz, Luigi Carro, Cesar A. Zeferino, Altamiro Amadeu Susin. 14-19 [doi]
- Design of Functional Blocks for a Speech Recognition Portable SystemJosé Luis Gómez-Cipriano, Roger Pizzatto Nunes, Sergio Bampi, Dante Barone. 20-27 [doi]
- On a Development Environment for Real-Time Information Processing in System-on-Chip SolutionsMarcel Jacomet, Josef Goette, Jörg Breitenstein, Markus Hager. 28-31 [doi]
- RABBIT - A Modular Rapid Prototyping Platform for Distributed Mechatronic SystemsMauro Cesar Zanella, Michael Robrecht, André Luiz de Freitas Francisco, A. Horst, Thomas Lehmann 0001, R. Gielow. 32-37 [doi]
- Using the CAN Protocol and Reconfigurable Computing Technology for Web-Based Smart House AutoFernando Moraes 0001, Alexandre M. Amory, Ney Calazans, Eduardo Bezerra 0001, Juracy Petrini. 38-43 [doi]
- A FPGA Implementation of a DCT-Based Digital Electrocardiographic Signal Compression DeviceBruno Santos Pimentel, João Hilário de Ávila Valgas Filho, Rodrigo Lacerda Campos, Antônio Otávio Fernandes, Claudionor José Nunes Coelho Jr.. 44-51 [doi]
- An Automated Tool for Analysis and Design of MVL Digital CircuitsL. P. Nascimento. 52-57 [doi]
- New Aspects in High-Level Specification, Verification, and Design of IT ProtocolsHeinz-Dieter Hümmer, Walter Geisselhardt. 58-63 [doi]
- Optimizing BDD-Based Verification Analysing Variable DependenciesDavid Déharbe, Jorgiano Márcio Bruno Vidal. 64-71 [doi]
- A Petri Net Based Approach for Hardware/Software PartitioningFred Cruz Filho, Paulo Maciel 0001, Edna Barros. 72-77 [doi]
- A Petri Net Based Method for Resource Estimation: An Approach Considering Data-Dependency, Casual and Temporal PrecedencesPaulo Maciel 0001, Fred Cruz Filho, Edna Barros. 78-84 [doi]
- A Repartitioning and HW/SW Partitioning Algorithm to the Automatic Design Space Exploration in the Co-Synthesis of Embedded SystemsFrancisco Assis M. do Nascimento, Wolfgang Rosenstiel. 85-90 [doi]
- An Embedded Converter from RS232 to Universal Serial BusAna Luiza de Almeida Pereira Zuquim, Claudionor José Nunes Coelho Jr., Antônio Otávio Fernandes, Marcos Pêgo de Oliveira, Andréa Iabrudi Tavares. 91-97 [doi]
- Interconnection Length Estimation at Logic-LevelJoão Baptista dos Santos Martins, Fernando Moraes 0001, Ricardo Reis 0001. 98-102 [doi]
- A BIST Procedure for Analog Mixers in Software RadioAndré C. Nácul, Luigi Carro, Daniel Janner, Marcelo Lubaszewski. 103-108 [doi]
- Summarizing a New Approach to Design Speech Recognition Systems: A Reliable Noise-Immune HW-SW VersionFabian Vargas 0001, Rubem Dutra Ribeiro Fagundes, Daniel Barros Jr.. 109-114 [doi]
- An Integrated High-Level Test Synthesis for Built-in Self-Testable DesignsLaurence Tianruo Yang, Jon C. Muzio. 115-123 [doi]
- A 3-V 12-Bit Second Order Sigma-Delta Modulator Design in 0.8µm CMOSCarlos Renato T. de Mori, Paulo César Crepaldi, Tales Cleber Pimenta. 124-129 [doi]
- Analog Circuit Design Using Graded-Channel SOI NMOSFETSMarcelo Antonio Pavanello, João Antonio Martino, Denis Flandre. 130-135 [doi]
- A Simplified Methodology for the Extraction of the ACM MOST Model ParametersRafael M. Coitinho, Luís H. Spiller, Márcio C. Schneider, Carlos Galup-Montoro. 136-141 [doi]
- An Environment to Aid the Synthesis of ThreePhase Analogue Waveform Using AHDLA. C. R. Silva, A. S. Cardoso. 142-149 [doi]
- A Fast Asynchronous Re-Configurable Architecture for Multimedia ApplicationsAchim Rettberg, Bernd Kleinjohann. 150-155 [doi]
- Data Encription in an Electronic Ballot BoxRicardo Pezzuol Jacobi, Luis Gustavo Carvalho, João Coelho. 156-160 [doi]
- Extending Sequencing Graphs for Reconfigurable Applications ModelingAlexandro M. S. Adário, Sergio Bampi. 161-167 [doi]
- Designing VLSI Circuit Masks with the Software Agents2Evandro de Araújo Jardini, Dilvan de Abreu Moreira. 168-173 [doi]
- Jale3D - Platform-independent IC/MEMS Layout Edition ToolLuciano Copello Ost, Marcos Mainardi, Leandro Soares Indrusiak, Ricardo Reis 0001. 174-179 [doi]
- LEGAL: An Algorithm for Simultaneous Net RoutingMarcelo de Oliveira Johann, Ricardo Augusto da Luz Reis. 180-185 [doi]
- Testing the Printability of VLSI LayoutsRui Martins, Heinrich Kirchauer. 186-193 [doi]
- On Designing Mixed-Signal Fuzzy Logic Controllers as Embedded Subsystems in Standard CMOS TechnologiesCarlos Dualibe, Paul G. A. Jespers, Michel Verleysen. 194-200 [doi]
- Power Efficient Arithmetic Operand EncodingEduardo Costa 0001, Sergio Bampi, José Monteiro 0001. 201-206 [doi]
- Low-Voltage Class AB Operational AmplifierVolney C. Vincence, Carlos Galup-Montoro, Márcio C. Schneider. 207-211 [doi]
- Power Optimized Viterbi Decoder Implementation through Architectural TransformsJoão Portela, José Monteiro 0001. 212-219 [doi]
- Synthesis of Multi-Burst Controllers as Modified Huffman MachinesDuarte Lopes de Oliveira, Wagner Chiepa Cunha, Marius Strum, Wang Jiang Chau. 220-225 [doi]
- Pipelined Fast 2-D DCT Architecture for JPEG Image CompressionLuciano Volcan Agostini, Sergio Bampi, Ivan Saraiva Silva. 226-231 [doi]
- IDCT Design for JPEG Decompression in an Electronic Ballot BoxRicardo Pezzuol Jacobi, José Porfírio A. de Carvalho. 232-236 [doi]