Time-multiplexed FPGA overlays with linear interconnect - researchr publication bibtex

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Xiangwei Li. Time-multiplexed FPGA overlays with linear interconnect. PhD thesis, Nanyang Technological University, Singapore, 2018. [doi]

@phdthesis{sg-815,
  title = {Time-multiplexed FPGA overlays with linear interconnect},
  author = {Xiangwei Li},
  year = {2018},
  doi = {10.32657/10220/46937},
  url = {https://doi.org/10.32657/10220/46937},
  researchr = {https://researchr.org/publication/sg-815},
  cites = {0},
  citedby = {0},
  school = {Nanyang Technological University, Singapore},
}

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