Abstract is missing.
- Heterogeneity and interconnectGanapati Srinivasa. 1 [doi]
- Interconnect scaling into the sub-10nm regimeXiangyu Chen, Jiale Liang, H.-S. Philip Wong. 2 [doi]
- Impact of lithography retargeting process on low level interconnect in 20nm technologyHongbo Zhang, Yunfei Deng, Jongwook Kye, Martin D. F. Wong. 3-10 [doi]
- An on-chip global broadcast network design with equalized transmission lines in the 1024-core eraGuang Sun, Shih-Hung Weng, Chung-Kuan Cheng, Bill Lin, Lieguang Zeng. 11-18 [doi]
- Design and optimization of communication fabrics: an industrial perspectiveÜmit Y. Ogras, Michael Kishinevsky. 19 [doi]
- Towards the power networks of the future: needs, challenges and toolsMario Paolone. 20 [doi]
- A heuristic method for obstacle avoiding group Steiner tree constructionTuhina Samanta, Raka Sardar, Hafizur Rahaman, Parthasarathi Dasgupta, Bhargab B. Bhattacharya. 21 [doi]
- A locality-aware bi-level mesh-mesh 2d-noc architecture for future thousand core CMPsAnkit More, Baris Taskin. 22 [doi]
- Analysis of post-placement length estimationWilliam Swartz, Yang-Yang Li, Amin Farshidi, Laleh Behjat. 23 [doi]
- Energy-guided exploration of on-chip network design for exa-scale computingÜmit Y. Ogras, Yunus Emre, Jianping Xu, Timothy Kam, Michael Kishinevsky. 24-31 [doi]
- Optimizing heterogeneous NoC designYaniv Ben-Itzhak, Israel Cidon, Avinoam Kolodny. 32-39 [doi]
- Handling global traffic in future CMP NoCsRan Manevich, Israel Cidon, Avinoam Kolodny. 40-47 [doi]
- Improving broadcast efficiency in wireless sensor network time synchronization protocolsWenxun Huang, Yujuan Quan, Deming Chen. 48-55 [doi]