Andrew Stone - researchr alias

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Viewing Publication 1 - 15 from 15

2023

Local Protection Enforcement in the Path Computation Element Communication Protocol (PCEP)Andrew Stone, Mustapha Aïssaoui, Samuel Sidor, Siva Sivabalan. rfc, 9488:1-9, October 2023. [doi]

2013

Loop Chaining: A Programming Abstraction for Balancing Locality and ParallelismChristopher D. Krieger, Michelle Mills Strout, Catherine Olschanowsky, Andrew Stone, Stephen Guzik, Xinfeng Gao, Carlo Bertolli, Paul H. J. Kelly, Gihan R. Mudalige, Brian van Straalen, Sam Williams. ipps 2013: 375-384 [doi]

Abstractions to separate concerns in semi-regular gridsAndrew Stone, Michelle Mills Strout. ics 2013: 3-12 [doi]

2012

Abstractions for Defining Semi-Regular Grids Orthogonally from StencilsAndrew Stone, Michelle Mills Strout. lcpc 2013: 273-274 [doi]

Establishing a Miniapp as a programmability proxyAndrew Stone, John Dennis, Michelle Strout. ppopp 2012: 333-334 [doi]

2009

May/must analysis and the DFAGen data-flow analysis generatorAndrew Stone, Michelle Strout, Shweta Behere. INFSOF, 51(10):1440-1453, 2009. [doi]

2008

Automatic Determination of May/Must Set Usage in Data-Flow AnalysisAndrew Stone, Michelle Strout, Shweta Behere. SCAM 2008: 153-162 [doi]

Automatic Determination of May/Must Set Usage in Data-Flow AnalysisAndrew Stone, Michelle Strout, Shweta Behere. Source Code Analysis and Manipulation, IEEE International Workshop on, 0, 2008. [doi]

2007

Profiling and Tracing Stakeholder NeedsPeter Sawyer, Ricardo Gacitua, Andrew Stone. monterey 2008: 196-213 [doi]

2006

Exposing Tacit Knowledge via Pre-Requirements TracingAndrew Stone, Peter Sawyer. RE 2006: 346-347 [doi]

Using pre-requirements tracing to investigate requirements based on tactic knowledgeAndrew Stone, Peter Sawyer. ICSOFT 2006: 139-144

Identifying tacit knowledge-based requirementsAndrew Stone, Peter Sawyer. iee, 153(6):211-218, 2006. [doi]

2000

Minimal Complexity Hierarchical Loop Representations of SFG Processors for Optimal High Level SynthesisAndrew Stone, Elias S. Manolakos. asap 2000: 92-102 [doi]

DG2VHDL: A Tool to Facilitate the High Level Synthesis of Parallel Processing Array ArchitecturesAndrew Stone, Elias S. Manolakos. vlsisp, 24(1):99-120, 2000. [doi]

1999

Synthesis of array architectures for block matching motion estimation: design exploration using the tool DG2VHDLJohn Bonk, Andrew Stone, Elias S. Manolakos. icassp 1999: 1925-1928 [doi]

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