Markus Meissner - researchr alias

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Viewing Publication 1 - 7 from 7

2015

FEATS - Framework for Explorative, Analog Topology SynthesisMarkus Meissner. PhD thesis, Frankfurt University, Germany, 2015. [doi]

FEATS: Framework for Explorative Analog Topology SynthesisMarkus Meissner, Lars Hedrich. tcad, 34(2):213-226, 2015. [doi]

Semiautomatic implementation of a bioinspired reliable analog task distribution architecture for multiple analog coresJulius von Rosen, Markus Meissner, Lars Hedrich. date 2015: 912-915 [doi]

2012

Fast isomorphism testing for a graph-based analog circuit synthesis frameworkMarkus Meissner, Oliver Mitea, Linda Luy, Lars Hedrich. date 2012: 757-762 [doi]

2011

Topology synthesis of analog circuits with yield optimization and evaluation using pareto frontsOliver Mitea, Markus Meissner, Lars Hedrich. vlsi 2011: 78-81 [doi]

Automated constraint-driven topology synthesis for analog circuitsOliver Mitea, Markus Meissner, Lars Hedrich, P. Jores. date 2011: 1662-1665 [doi]

2004

BER Improvement Using a 2-R Regenerator Based on an Asymmetric Nonlinear Optical Loop MirrorMarkus Meissner, Klaus Sponsel, Kristian Cvecek, Andreas Benz, Stefan Weisser, Bernhard Schmauss, Gerd Leuchs. opnetec 2005: 438-444 [doi]

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