Design of a versatile and cost-effective hybrid floating-point/LNS arithmetic processor

Chichyang Chen, Paul Chow. Design of a versatile and cost-effective hybrid floating-point/LNS arithmetic processor. In Hai Zhou, Enrico Macii, Zhiyuan Yan, Yehia Massoud, editors, Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007. pages 540-545, ACM, 2007. [doi]

Abstract

Abstract is missing.