An FPGA run-time parameterisable Log-Normal Random Number Generator

Pedro Echeverría, David B. Thomas, Marisa López-Vallejo, Wayne Luk. An FPGA run-time parameterisable Log-Normal Random Number Generator. In Roger F. Woods, Katherine Compton, Christos-Savvas Bouganis, Pedro C. Diniz, editors, Reconfigurable Computing: Architectures, Tools and Applications, 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008. Proceedings. Volume 4943 of Lecture Notes in Computer Science, pages 219-230, Springer, 2008. [doi]

Abstract

Abstract is missing.