Shivani Raghav, Martino Ruggiero, David Atienza, Christian Pinto, Andrea Marongiu, Luca Benini. Scalable instruction set simulator for thousand-core architectures running on GPGPUs. In Waleed W. Smari, John P. McIntire, editors, Proceedings of the 2010 International Conference on High Performance Computing & Simulation, HPCS 2010, June 28 - July 2, 2010, Caen, France. pages 459-466, IEEE, 2010. [doi]
Abstract is missing.