A monolithic 1.25 Gbits/sec CMOS clock/data recovery circuit for fibre channel transceiver

L. Wu, H. Chen, S. Nagavarapu, Randall L. Geiger, E. Lee, W. Black. A monolithic 1.25 Gbits/sec CMOS clock/data recovery circuit for fibre channel transceiver. In International Symposium on Circuits and Systems (ISCAS 1999), May 30 - June 2, 1999, Orlando, Florida, USA. pages 565-568, IEEE, 1999. [doi]

Abstract

Abstract is missing.