Abstract is missing.
- Boolean Difference Based Reliability Evaluation of Fault-Tolerant Circuit Structures on FPGAsJahanzeb Anwer, Marco Platzner. 1-8 [doi]
- The Effect of the Transient Faults in Dependability PredictionMartin Danhel, Filip tepanek, Hana Kubatova. 9-13 [doi]
- AutoReloc: Automated Design Flow for Bitstream Relocation on Xilinx FPGAsAndre Lalevee, Pierre-Henri Horrein, Matthieu Arzel, Michael Hubner, Sandrine Vaton. 14-21 [doi]
- A Configurable Test-Processor for Board-Level TestingJorge H. Meza Escobar, Heinz-Dietrich Wuttke, Steffen Ostendorff. 22-29 [doi]
- Code Generation for Reconfigurable Explicit Datapath Architectures with LLVMMichael Adriaansen, Mark Wijtvliet, Roel Jordans, Luc Waeijen, Henk Corporaal. 30-37 [doi]
- Design of an Event-Driven Residential Demand Response InfrastructureRune Hylsberg Jacobsen, Armin Ghasem Azar, Emad Samuel Malki Ebeid. 38-45 [doi]
- A Formal Framework for Modeling Smart Grid Applications: Demand Response Case StudyArmin Ghasem Azar, Emad Ebeid, Rune Hylsberg Jacobsen. 46-54 [doi]
- A Software Stack for Next-Generation Automotive Systems on Many-Core Heterogeneous PlatformsPaolo Burgio, Marko Bertogna, Ignacio Sanudo Olmedo, Paolo Gai, Andrea Marongiu, Michal Sojka. 55-59 [doi]
- The ExaNeSt Project: Interconnects, Storage, and Packaging for Exascale SystemsManolis Katevenis, Nikolaos Chrysos, Manolis Marazakis, Iakovos Mavroidis, Fabien Chaix, N. Kallimanis, Javier Navaridas, John Goodacre, Piero Vicini, Andrea Biagioni, Pier Stanislao Paolucci, Alessandro Lonardo, Elena Pastorelli, Francesca Lo Cicero, Roberto Ammendola, P. Hopton, P. Coates, G. Taffoni, S. Cozzini, M. Kersten, Y. Zhang, Julio Sahuquillo, Sergio Lechago, C. Pinto, B. Lietzow, D. Everett, G. Perna. 60-67 [doi]
- The M2DC Project: Modular Microserver DataCentreMariano Cecowski, Giovanni Agosta, Ariel Oleksiak, Michal Kierzynka, Micha vor dem Berge, Wolfgang Christmann, Stefan Krupop, Mario Porrmann, Jens Hagemeyer, Rene Griessl, Meysam Peykanu, Lennart Tigges, Sven Rosinger, Daniel Schlitt, Christian Pieper, Carlo Brandolese, William Fornaciari, Gerardo Pelosi, Robert Plestenjak, Justin Cinkelj, Loïc Cudennec, Thierry Goubier, Jean-Marc Philippe, Udo Janssen, Chris Adeniyi-Jones. 68-74 [doi]
- A Model-Driven Approach for Validating Safe Adaptive BehaviorsMahmoud Hussein, Reda Nouacer, Ansgar Radermacher. 75-81 [doi]
- Fast and Reliable PUF Response Evaluation from Unsettled Bistable RingsRobert Hesselbarth, Georg Sigl. 82-90 [doi]
- RTL Implementations and FPGA Benchmarking of Three Authenticated Ciphers Competing in CAESAR Round TwoWilliam Diehl, Kris Gaj. 91-98 [doi]
- X25519 Hardware Implementation for Low-Latency ApplicationsPhilipp Koppermann, Fabrizio De Santis, Johann Heyszl, Georg Sigl. 99-106 [doi]
- Flexible FPGA-Based Architectures for Curve Point Multiplication over GF(p)Dorian Amiet, Andreas Curiger, Paul Zbinden. 107-114 [doi]
- SlideAcross: A Low-Latency Adaptive Router for Chip Multi-processorWen Zong, Liang Wang, Qiang Xu, Michael Opoku Agyeman. 115-122 [doi]
- CirKet: A Performance Efficient Hybrid Switching Mechanism for NoC ArchitecturesMohamad FallahRad, Ahmad Patooghy, Hesamedin Ziaeeziabari, Ebadollah Taheri. 123-130 [doi]
- Fault Tolerant Deadlock-Free Adaptive Routing Algorithms for Hexagonal Networks-on-ChipSadia Moriam, Gerhard P. Fettweis. 131-137 [doi]
- Adaptive Networks-on-Chip Routing with Fuzzy Logic ControlKonstantinos Tatas, C. Chrysostomou. 138-145 [doi]
- Evaluation of Synchronous Dataflow Graph Mappings onto Distributed Memory ArchitecturesYouen Lesparre, Alix Munier Kordon, Jean-Marc Delosme. 146-153 [doi]
- NS-SRAM: Neighborhood Solidarity SRAM for Reliability Enhancement of SRAM MemoriesIhsen Alouani, Hamzeh Ahangari, Özcan Özturk, Smaïl Niar. 154-159 [doi]
- MacSim: A MAC-Enabled High-Performance Low-Power SIMD ArchitectureTong Geng, Luc Waeijen, Maurice Peemen, Henk Corporaal, Yifan He. 160-167 [doi]
- Video SIMDBench: Benchmarking the Compiler Vectorization for Multimedia ApplicationsMichail Alvanos, Pedro Trancoso. 168-175 [doi]
- Embedded Multimodal Registration of Visible Images on Long-Wave Infrared Video in Real TimeFabian Inostroza, Javier Cardenas, Sebastian E. Godoy, Miguel Figueroa. 176-183 [doi]
- An Embedded Hardware Architecture for Real-Time Super-Resolution in Infrared CamerasRodolfo Redlich, Luis Araneda, Antonio Saavedra, Miguel Figueroa. 184-191 [doi]
- HTCC: Haskell to Handel-C Hardware CompilerAhmed B. Ablak, Issam Damaj. 192-199 [doi]
- A Low Latency and Energy Efficient Communication Architecture for Heterogeneous Long-Short Range CommunicationFayçal Ait Aoudia, Michele Magno, Matthieu Gautier, Olivier Berder, Luca Benini. 200-206 [doi]
- The AirSpeck Family of Static and Mobile Wireless Air Quality MonitorsD. K. Arvind, Janek Mann, Andrew Bates, Konstantin Kotsev. 207-214 [doi]
- A Fast Estimator of Performance with Respect to the Design Parameters of Self Re-Entrant FlowshopsUmar Waqas, Marc Geilen, Sander Stuijk, Joost van Pinxten, Twan Basten, Lou J. Somers, Henk Corporaal. 215-221 [doi]
- Dynamic Hardware Management of the H264/AVC Encoder Control Structure Using a Framework for System ScenariosYahya H. Yassin, Per Gunnar Kjeldsberg, Andrew Perkis, Francky Catthoor. 222-229 [doi]
- Flexible, Cost-Efficient, High-Throughput Architecture for Layered LDPC Decoders with Fully-Parallel Processing UnitsThien Truong Nguyen-Ly, Tushar Gupta, Manuel Pezzin, Valentin Savin, David Declercq, Sorin Cotofana. 230-237 [doi]
- Design of Efficient 1's Complement Modified Booth MultiplierKiamal K. Pekmestzi, Constaninos Efstathiou. 238-243 [doi]
- QC-LDPC Gear-Like Decoder Architecture with Multi-domain QuantizationOana Boncalo. 244-251 [doi]
- Multi-modal Building Energy Management System for Residential Demand ResponseSergi Rotger-Griful, Ubbe Welling, Rune Hylsberg Jacobsen. 252-259 [doi]
- Model-Driven Design Approach for Building Smart Grid ApplicationsEmad Ebeid, Martin Valov, Rune Hylsberg Jacobsen. 260-267 [doi]
- CoFELS: Conceptual Framework for Electricity Load Shifting System DesignJung-Min Kim, Rune Hylsberg Jacobsen, Robert Stephen Brewer. 268-275 [doi]
- PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic AnalysisFrancisco J. Cazorla, Jaume Abella, Jan Andersson, Tullio Vardanega, Francis Vatrinet, Iain Bate, Ian Broster, Mikel Azkarate-askasua, Franck Wartel, Liliana Cucu, Fabrice Cros, Glenn Farrall, Adriana Gogonel, Andrea Gianarro, Benoit Triquet, Carles Hernández, Code Lo, Cristian Maxim, David Morales, Eduardo Quiñones, Enrico Mezzetti, Leonidas Kosmidis, Irune Agirre, Mikel Fernández, Mladen Slijepcevic, Philippa Conmy, Walid Talaboulma. 276-285 [doi]
- CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional PropertiesRalph Görgen, Kim Grüttner, Fernando Herrera, Pablo Peñil, Julio L. Medina, Eugenio Villar, Gianluca Palermo, William Fornaciari, Carlo Brandolese, Davide Gadioli, Sara Bocchio, Luca Ceva, Paolo Azzoni, Massimo Poncino, Sara Vinco, Enrico Macii, Salvatore Cusenza, John Favaro, Raúl Valencia, Ingo Sander, Kathrin Rosvall, Davide Quaglia. 286-293 [doi]
- SAFEPOWER Project: Architecture for Safe and Power-Efficient Mixed-Criticality SystemsAlina Lenz, Mikel Azkarate-Askasua Blazquez, Javier Coronel, Alfons Crespo, Simon Davidmann, Juan Carlos Diaz Garcia, Nera Gonzalez Romero, Kim Grüttner, Roman Obermaisser, Johnny Öberg, Jon Perez, Ingo Sander, Ingemar Söderquist. 294-300 [doi]
- Wind Energy Harvesting for Autonomous Wireless Sensor NetworksAdnant Jushi, Alain Pegatoquet, Trong Nhan Le. 301-308 [doi]
- A Reliable MAC for Energy-Efficient WSNs in the Era of IoTPhilip Parsch, Alejandro Masrur. 309-317 [doi]
- Using SystemC Cyber Models in an FMI Co-Simulation Environment: Results and Proposed FMI EnhancementsStefano Centomo, Julien DeAntoni, Robert de Simone. 318-325 [doi]
- OPERA: A Low Power Approach to the Next Generation Cloud InfrastructuresAlberto Scionti, Pietro Ruiu, Olivier Terzo, Joel Nider, Craig Petrie, Niccolo Baldoni. 326-333 [doi]
- Synthesis and Performance Optimization of a Switching Nano-Crossbar ComputerDan Alexandrescu, Mustafa Altun, Lorena Anghel, Anna Bernasconi, Valentina Ciriani, Luca Frontini, Mehdi Baradaran Tahoori. 334-341 [doi]
- Efficiency Modeling and Analysis of 64-bit ARM Clusters for HPCJoel Wanza Weloli, Sébastien Bilavarn, Said Derradji, Cécile Belleudy, Sylvie Lesmanne. 342-347 [doi]
- Luminous Tiles: A New Smart Device for Buildings and ArchitecturesTullio Facchinetti, Guido Benetti, Alessandro Tramonte, Luca Carraro, Mauro Benedetti, Enrico Maria Randone, Marcello Simonetta, Giorgio Capelli, Guido Giuliani. 348-355 [doi]
- Pre-Emptive Garbage Collection for SSD RAIDAlistair A. McEwan, Muhammed Ziya Komsul. 356-363 [doi]
- Efficient Checkpointing-Based Safety-Verification Flow Using Compiled-Code SimulationBogdan-Andrei Tabacaru, Moomen Chaari, Wolfgang Ecker, Thomas Kruse, Cristiano Novello. 364-371 [doi]
- Does Cascading Schmitt-Trigger Stages Improve the Metastable Behavior?Andreas Steininger, Robert Najvirt, Jürgen Maier. 372-379 [doi]
- Regression Test Suites Optimization for Application-specific Instruction-Set Processors and Their Use for Dependability AnalysisMarcela Zachariaova, Michaela Kekelyova-Beleova, Zdenek Kotásek. 380-387 [doi]
- Introducing Utilization Caps into Mixed-Criticality SchedulingMitra Mahdiani, Alejandro Masrur. 388-395 [doi]
- A Realistic Approach to a Network-on-Chip Cross-Domain PatternAsier Larrucea, Hamidreza Ahmadian, Roman Obermaisser, Jon Perez, Carlos Fernando Nicolas. 396-403 [doi]
- pTNoC: Probabilistically Time-Analyzable Tree-Based NoC for Mixed-Criticality SystemsMladen Slijepcevic, Mikel Fernández, Carles Hernández, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla. 404-412 [doi]
- Quantum Machine Learning Based on Minimizing Kronecker-Reed-Muller Forms and Grover Search Algorithm with Hybrid OraclesBryan Lee, Marek A. Perkowski. 413-422 [doi]
- Logic Synthesis for Switching Lattices by Decomposition with P-CircuitsAnna Bernasconi, Valentina Ciriani, Luca Frontini, Valentino Liberali, Gabriella Trucco, Tiziano Villa. 423-430 [doi]
- Remote Dynamic Clock Reconfiguration Based Attacks on Internet of Things ApplicationsAnju P. Johnson, Sikhar Patranabis, Rajat Subhra Chakraborty, Debdeep Mukhopadhyay. 431-438 [doi]
- Secured Miniaturized System-in-Package Contactless and Passive Authentication Devices Featuring NFCJürgen Schilling, Walther Pachler, Bernhard Roitner, Thomas Ruprechter, Holger Bock, Gerald Holweg, Norbert Druml. 439-445 [doi]
- Cylindrical Reconvergence Physical Unclonable FunctionRodrigo C. Surita, Mario L. Côrtes, Diego F. Aranha, Guido Araujo. 446-453 [doi]
- Resolving Performance Interference in SR-IOV Setups with PCIe Quality-of-Service ExtensionsAndre Richter, Christian Herber, Thomas Wild, Andreas Herkersdorf. 454-462 [doi]
- Using Model-Based Testing for Manufacturing and Integration-Testing of Embedded Control SystemsTobias Rauter, Andrea Höller, Johannes Iber, Christian Kreiner. 463-470 [doi]
- Improved Task Scheduler for Dual-Core Real-Time SystemsLukas Kohutka, Viera Stopjaková. 471-478 [doi]
- A Majority-Based Reliability-Aware Task-Mapping in High-Performance Homogenous NoC ArchitecturesAlireza Namazi, Meisam Abdollahi, Saeed Safari, Siamak Mohammadi. 479-486 [doi]
- Verification of Robot Controller for Evaluating Impacts of Faults in Electro-Mechanical SystemsJakub Podivinsky, Ondrej Cekan, Jakub Lojda, Zdenek Kotásek. 487-494 [doi]
- Error Correction Method Based on the Short-Duration Offline TestJan Belohoubek, Petr Fiser, Jan Schmidt. 495-502 [doi]
- Testability Based Metric for Hardware Trojan Vulnerability AssessmentSayandeep Saha, Rajat Subhra Chakraborty, Debdeep Mukhopadhyay. 503-510 [doi]
- HLS-Based Methodology for Fast Iterative Development Applied to Elliptic Curve ArithmeticSimon Pontie, Alban Bourge, Adrien Prost-Boucle, Paolo Maistri, Olivier Muller, Régis Leveugle, Frédéric Rousseau. 511-518 [doi]
- True Random Number Generator Based on ROPUF CircuitSimona Buchovecka, Róbert Lórencz, Filip Kodýtek, Jiri Bucek. 519-523 [doi]
- The EMC2 Project on Embedded Microcontrollers: Technical Progress after Two YearsWerner Weber, Alfred Hoess, Jan van Deventer, Frank Oppenheimer, Rolf Ernst, Adam Kostrzewa, Philippe Dore, Thierry Goubier, Haris Isakovic, Norbert Druml, Egon Wuchner, Daniel Schneider 0001, Erwin Schoitsch, Eric Armengaud, Thomas Soderqvist, Massimo Traversone, Sascha Uhrig, Juan Carlos Pérez-Cortes, Sergio Saez, Juha Kuusela, Mark van Helvoort, Xing Cai, Bjørn Nordmoen, Geir Yngve Paulsen, Hans Petter Dahle, Michael Geissel, Jürgen Salecker, Peter Tummeltshammer. 524-531 [doi]
- The SafeCOP ECSEL Project: Safe Cooperating Cyber-Physical Systems Using Wireless CommunicationPaul Pop, Detlef Scholle, Hans Hansson, Gunnar Widforss, Malin Rosqvist. 532-538 [doi]
- AXIOM: A Hardware-Software Platform for Cyber Physical SystemsSomnath Mazumdar, Eduard Ayguadé, Nicola Bettin, Javier Bueno, Sara Ermini, Antonio Filgueras, Daniel Jiménez-González, Carlos Álvarez-Martinez, Xavier Martorell, Francesco Montefoschi, David Oro, Dionisis N. Pnevmatikatos, Antonio Rizzo, Dimitris Theodoropoulos, Roberto Giorgi. 539-546 [doi]
- Low-Power Online ECG Analysis Using Neural NetworksMehdi Modarressi, Ali Yasoubi, Maryam Modarressi. 547-552 [doi]
- Ultra-Low Power Estimation of Heart Rate Under Physical Activity Using a Wearable Photoplethysmographic SystemElisabetta De Giovanni, Srinivasan Murali, Francisco J. Rincón, David Atienza. 553-560 [doi]
- Energy Modeling and Architecture Exploration for Emotion Detection SystemsChaka Kone, Cécile Belleudy, Nhan Le Thanh. 561-566 [doi]
- A Control of Electric Wheelchair Using an EMG Based on Degree of Muscular ActivityChiharu Ishii, Ryoichi Konishi. 567-574 [doi]
- Elastic Management and QoS Provisioning Scheme for Adaptable Multi-core Protocol Processing ArchitectureMohammad Badawi, Zhonghai Lu, Ahmed Hemani. 575-583 [doi]
- High-Performance FPGA Architecture for Multi-line Beamforming in Ultrasound ApplicationsValentino Meacci, Luca Bassi, Stefano Ricci, Enrico Boni, Piero Tortoli. 584-590 [doi]
- Dynamically Reconfigurable Architecture with Atomic Configuration Updates for Flexible Regular Expressions Matching in FPGAVlastimil Kosar, Jan Korenek. 591-598 [doi]
- Multi-granular Arithmetic in a Coarse-Grain Reconfigurable ArchitectureStef Louwers, Luc Waeijen, Mark Wijtvliet, Ruud Koolen, Henk Corporaal. 599-606 [doi]
- Adaptive Control of the Heating System for Optimized Energy Consumption in Electric VehiclesRhea Valentina, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel. 607-612 [doi]
- Braking in Close Following Platoons: The Law of the WeakestDharshan Krishna Murthy, Alejandro Masrur. 613-620 [doi]
- V2I Cooperation for Traffic Management with SafeCopGiovanni Agosta, Alessandro Barenghi, Carlo Brandolese, William Fornaciari, Gerardo Pelosi, Stefano Delucchi, Massimo Massa, Maurizio Mongelli, Enrico Ferrari, Leonardo Napoletani, Luciano Bozzi, Carlo Tieri, Dajana Cassioli, Luigi Pomante. 621-627 [doi]
- SecUp: Secure and Efficient Wireless Software Updates for VehiclesMarco Steger, Carlo Alberto Boano, Michael Karner, Joachim Hillebrand, Werner Rom, Kay Römer. 628-636 [doi]
- Probing Approximate TMR in Error Resilient Applications for Better Design TradeoffsTooba Arifeen, Abdus Sami Hassan, Hossein Moradian, Jeong-A. Lee. 637-640 [doi]
- Using Timing-Driven Inter-FPGA Routing for Multi-FPGA Prototyping ExplorationUmer Farooq, Roselyne Chotin-Avot, Moazam Azeem, Zouha Cherif, Maminionja Ravoson, Saqib Khan, Habib Mehrez. 641-645 [doi]
- Novel FPGA-Based Low-Cost Hardware Architecture for the PRESENT Block CipherCarlos Andres Lara-Nino, Miguel Morales-Sandoval, Arturo Diaz-Perez. 646-650 [doi]
- Unum: Adaptive Floating-Point ArithmeticEnric Morancho. 651-656 [doi]
- Synthesis of Multivalued Logical Networks for FPGA ImplementationsStanislaw Deniziak, Mariusz Wisniewski, Karol Wieczorek. 657-660 [doi]
- Test Decompressor Effectivity ImprovementOndrej Novák, Jiri Jenícek, Martin Rozkovec. 661-664 [doi]
- On Power-Analysis Resistant Hardware Implementations of ECC-Based CryptosystemsRoman Willi, Andreas Curiger, Paul Zbinden. 665-669 [doi]
- Polynomial Based NUC Implemented on FPGAMartin Rozkovec, Jiri Bucek. 670-673 [doi]
- A Library to Model and Configure Large Regular Structures in SystemCChristian Amstutz, Oliver Sander. 674-677 [doi]
- TERO-Based Detection of Hardware Trojans on FPGA Implementation of the AES AlgorithmParis Kitsos, Kyriakos Stefanidis, Artemios G. Voyiatzis. 678-681 [doi]
- Device Context Classification for Mobile Power Consumption ReductionIsmat Chaib Draa, Maroi Nouiri, Smaïl Niar, Abdelghani Bekrar. 682-685 [doi]
- Low-Cost Platform-Independent FPGA Based Real-Time Systems TesterDiaa Jadaan, Kyrre Gonsholt, Amund Skavhaug. 686-689 [doi]
- Enhanced Duplication Method with TMR-Like Masking AbilitiesJaroslav Borecky, Martin Kohlík, Pavel Vit, Hana Kubatova. 690-693 [doi]
- Design and Physical Implementation of a Target ASIC for SET ExperimentsVaradan Savulimedu Veeravalli, Andreas Steininger. 694-697 [doi]
- Temperature Dependence of ROPUF on FPGAFilip Kodýtek, Róbert Lórencz, Jiri Bucek, Simona Buchovecka. 698-702 [doi]
- Testing for Intermittent Resistive Faults in CMOS Integrated SystemsHassan Ebrahimi, Hans G. Kerkhoff. 703-707 [doi]
- Verifying Linear Temporal Logic Properties in UML/OCL Class Diagrams Using FilmstrippingFrank Hilken, Martin Gogolla. 708-713 [doi]
- An Interactive Design Space Exploration Tool for Dependable Integrated CircuitsStefan Scharoba, Heinrich Theodor Vierhaus. 714-717 [doi]
- Model-Based Evaluation of System Scalability: Bandwidth Analysis for Smartphone-Based Biosensing ApplicationsFrancois Patou, Maria Dimaki, Winnie E. Svendsen, Jan Madsen. 718-722 [doi]
- Implementation of a Boolean Masking Scheme for the SCREAM CipherWilliam Diehl, Kris Gaj. 723-726 [doi]