Abstract is missing.
- Where Intel s Microprocessor Architecture is GoingRobert P. Colwell. 3-6
- Enabling Killer Applications of Reconfigurable Systems: ERSA Keynote and IntroductionDonald W. Bouldin. 7-16
- Reconfigurable Architectures for Adaptable Mobile SystemsGerard J. M. Smit, Gerard K. Rauwerda. 17-25
- Microprocessors: The New LUTSteven A. Guccione. 26-25
- Reconfigurable Instruction Set Computing for Embedded ProcessingCharlé R. Rupp. 36
- Configurable Processors and the Evolution of System-on-Chip DesignDror E. Maydan. 37
- What s the Future of C-Based Programmable SoC design?Chris Sullivan. 38-40
- A SoPC Architecture of MIMO Sphere Decoder for Mobile CommunicationsJing Ma, Xin-Ming Huang. 41-47
- A Compact MD5 and SHA-1 Co-Implementation Utilizing Algorithm SimilaritiesKimmo U. Järvinen, Matti Tommiska, Jorma Skyttä. 48-54
- Rapid Arithmetic Level Simulation Based Energy Estimation for Hardware/Software Co-Design Using FPGAsJingzhao Ou, Viktor K. Prasanna. 55-61
- Implementing an Adaptive Viterbi Algorithm in Coarse-Grained Reconfigurable HardwareGerard K. Rauwerda, Gerard J. M. Smit, Werner Brugger. 62-70
- Aspect Ratio Effects on Reconfigurable ComputingFei Wang, Jack S. N. Jean, Shuxia Sun. 71-77
- Output Serialization for FPGA-based and Coarse-grained Processor ArraysFrank Hannig, Jürgen Teich. 78-84
- Optimizing Interface Implementation Costs Using Runtime Reconfigurable SystemsStefan Ihmor, Florian Dittmann. 85-91
- Defragmenting the Module Layout of a Partially Reconfigurable DeviceJan van der Veen, Sándor P. Fekete, Mateusz Majer, Ali Ahmadinia, Christophe Bobda, Frank Hannig, Jürgen Teich. 92-104
- Accelerating Exact Stochastic Simulation Using Reconfigurable ComputingBrandon Thurmon, James M. McCollum, Gregory D. Peterson, Chris D. Cox, Nagiza F. Samatova, Gary Sayler, Michael L. Simpson. 105-111
- A 1.5-D Architecture for Back-Propagation TrainingSanjay V. Rajopadhye, Kolin Paul. 112-118
- Area-Efficient Evaluation of a Class of Arithmetic Expressions Using Deeply Pipelined Floating-Point CoresRonald Scrofano, Ling Zhuo, Viktor K. Prasanna. 119-128
- The Design And Application Of A High-End Reconfigurable Computing SystemChen Chang, John Wawrzynek, Pierre-Yves Droz, Robert W. Brodersen. 129-136
- A Library of Parameterizable Floating-Point Cores for FPGAs and Their Application to Scientific ComputingRonald Scrofano, Gokul Govindu, Viktor K. Prasanna. 137-148
- A Combined Hardware-Software Architecture for Network FlowWayne Luk, Sherif Yusuf, Morris Sloman, Geoffrey Brown, Emil C. Lupu, Naranker Dulay. 149-155
- Balancing FPGA Resource UtilitiesXuejun Liang, Jeffrey S. Vetter, Melissa C. Smith, Arthur S. Bland. 156-162
- An Operation and Interconnection Sharing Algorithm for Partially Reconfigurable ArchitecturesSungjoon Jung, Tag Gon Kim. 163-174
- Performance Monitoring for Run-time Management of Reconfigurable DevicesRyan A. DeVille, Ian A. Troxel, Alan D. George. 175-181
- Improved Microarchitecture Support for Dynamic Task Scheduling on Reconfigurable ArchitecturesZexin Pan, Juanjo Noguera, B. Earl Wells. 182-188
- Flexible Core Reallocation for Virtex II StructuresYana Esteves Krasteva, Ana B. Jimeno, Eduardo de la Torre, Teresa Riesgo. 189-195
- Area Reclamation Strategies and Metrics for SRAM-Based Reconfigurable DevicesAbdel Ejnioui, Ronald F. DeMara. 196-202
- A Hardware Implementation of a Dynamically Adjustable Block-based Neural NetworkShaoyu Liu, Gregory D. Peterson, Seong Kong. 203-210
- CliffoSor, an Innovative FPGA-based Architecture for Geometric AlgebraAntonio Gentile, Salvatore Segreto, Filippo Sorbello, Giorgio Vassallo, Salvatore Vitabile, Vincenzo Vullo. 211-217
- Cell Based Motion Estimators for Reconfigurable PlatformsWim J. C. Melis, Kieron Turkington, Alexander Whitton, Wayne Luk, Peter Y. K. Cheung, Paul Metzgen. 218-224
- Reconfigurable 1-Bit Processor Array with Reduced Wirng AreaNobuo Nakai, Masaki Nakanishi, Shigeru Yamashita, Katsumasa Watanabe. 225-234
- A Reconfigurable Antialiasing Filter Design Using Multi-Abstraction Design Exploration ApproachOtsebele E. Nare, Charles T. Johnson-Bey. 235-238
- Data Partitioning and Optimizations for Reconfigurable ArchitecturesWenrui Gong, Yan Meng, Gang Wang, Ryan Kastner, Timothy Sherwood. 239-242
- Instance-Specific Versus Parameter-Specific Circuit GenerationKenneth B. Kent, Zhao Yong, Jacqueline E. Rice, Troy Ronda. 243-246
- Application Specific Reconfigurable Architecture DesignAli Akoglu, Sethuraman Panchanathan. 247-250
- A Device-Controlled Dynamic Configuration Framework Supporting Heterogeneous Resource ManagementHeng Tan, Ronald F. DeMara. 251-254
- Algorithms For Scheduling Of Data Transfer Across FPGAs In A GridJanak Porwal, Sachin Patkar. 255-260
- A Non-LIinear Function Generator Using BRMYoungsoo Kim, Dongsoo Kim, Daesun Park, Sungjo Kim. 261-262
- Abstract Synthesis of Turbo Decoder Elements onto Reconfigurable CircuitCaaliph Andriamisaina, Catherine Dezan, Christophe Jégo, Bernard Pottier. 263-266
- FPGA-Based High-Order Finite Difference Algorithm for 2D Acoustic Wave Propagation ProblemsChuan He, Wei Zhao, Mi Lu. 267-273
- Compiling Stream-Language Applications to a Reconfigurable Array ProcessorZain-ul-Abdin, Bertil Svensson. 274-275
- A Multi-Pattern Scheduling AlgorithmYuanqing Guo, Cornelis Hoede, Gerard J. M. Smit. 276