Abstract is missing.
- Revisiting Graph Coloring Register Allocation: A Study of the Chaitin-Briggs and Callahan-Koblenz AlgorithmsKeith D. Cooper, Anshuman Dasgupta, Jason Eckhardt. 1-16 [doi]
- Register Pressure in Software-Pipelined Loop Nests: Fast Computation and Impact on Architecture DesignAlban Douillet, Guang R. Gao. 17-31 [doi]
- Manipulating MAXLIVE for Spill-Free Register AllocationShashi Deepa Arcot, Henry G. Dietz, Sarojini Priyadarshini Rajachidambaram. 32-46 [doi]
- Optimizing Packet Accesses for a Domain Specific Language on Network ProcessorsTao Liu, Xiao-Feng Li, Lixia Liu, Chengyong Wu, Roy Ju. 47-61 [doi]
- Array Replication to Increase Parallelism in Applications Mapped to Configurable ArchitecturesHeidi E. Ziegler, Priyadarshini L. Malusare, Pedro C. Diniz. 62-75 [doi]
- Generation of Control and Data Flow Graphs from Scheduled and Pipelined Assembly CodeDavid Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee. 76-90 [doi]
- Applying Data Copy to Improve Memory Performance of General Array ComputationsQing Yi. 91-105 [doi]
- A Cache-Conscious Profitability Model for Empirical Tuning of Loop FusionApan Qasem, Ken Kennedy. 106-120 [doi]
- Optimizing Matrix Multiplication with a Classifier Learning SystemXiaoming Li, María Jesús Garzarán. 121-135 [doi]
- A Language for the Compact Representation of Multiple Program VersionsSébastien Donadio, James C. Brodman, Thomas Roeder, Kamen Yotov, Denis Barthou, Albert Cohen, María Jesús Garzarán, David A. Padua, Keshav Pingali. 136-151 [doi]
- Efficient Computation of May-Happen-in-Parallel Information for Concurrent Java ProgramsRajkishore Barik. 152-169 [doi]
- Evaluating the Impact of Thread Escape Analysis on a Memory Consistency Model-Aware CompilerChi-Leung Wong, Zehra Sura, Xing Fang, Kyungwoo Lee, Samuel P. Midkiff, Jaejin Lee, David A. Padua. 170-184 [doi]
- Concurrency Analysis for Parallel Programs with Textually Aligned BarriersAmir Kamil, Katherine A. Yelick. 185-199 [doi]
- Titanium Performance and Potential: An NPB Experimental StudyKaushik Datta, Dan Bonachea, Katherine A. Yelick. 200-214 [doi]
- Efficient Search-Space Pruning for Integrated Fusion and Tiling TransformationsXiaoyang Gao, Sriram Krishnamoorthy, Swarup Kumar Sahoo, Chi-Chung Lam, Gerald Baumgartner, J. Ramanujam, P. Sadayappan. 215-229 [doi]
- Automatic Measurement of Instruction Cache CapacityKamen Yotov, Sandra Jackson, Tyler Steele, Keshav Pingali, Paul Stodghill. 230-243 [doi]
- Combined ILP and Register Tiling: Analytical Model and Optimization FrameworkLakshminarayanan Renganarayanan, U. Ramakrishna, Sanjay V. Rajopadhye. 244-258 [doi]
- Analytic Models and Empirical Search: A Hybrid Approach to Code OptimizationArkady Epshteyn, María Jesús Garzarán, Gerald DeJong, David A. Padua, Gang Ren, Xiaoming Li, Kamen Yotov, Keshav Pingali. 259-273 [doi]
- Testing Speculative Work in a Lazy/Eager Parallel Functional LanguageAlberto de la Encina, Ismael Rodríguez, Fernando Rubio. 274-288 [doi]
- Loop Selection for Thread-Level SpeculationShengyue Wang, Xiaoru Dai, Kiran Yellajyosula, Antonia Zhai, Pen-Chung Yew. 289-303 [doi]
- Software Thread Level Speculation for the Java Language and Virtual Machine EnvironmentChristopher J. F. Pickett, Clark Verbrugge. 304-318 [doi]
- Lightweight Monitoring of the Progress of Remotely Executing ComputationsShuo Yang, Ali Raza Butt, Y. Charlie Hu, Samuel P. Midkiff. 319-333 [doi]
- Using Platform-Specific Performance Counters for Dynamic CompilationFlorian T. Schneider, Thomas R. Gross. 334-346 [doi]
- A Domain-Specific Interpreter for Parallelizing a Large Mixed-Language Visualisation ApplicationKaren Osmond, Olav Beckmann, Tony Field, Paul H. J. Kelly. 347-361 [doi]
- Compiler Control Power Saving Scheme for Multi Core ProcessorsJun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara. 362-376 [doi]
- Code Transformations for One-Pass AnalysisXiaogang Li, Gagan Agrawal. 377-396 [doi]
- Scalable Array SSA and Array Data Flow AnalysisSilvius Rus, Guobin He, Lawrence Rauchwerger. 397-412 [doi]
- Interprocedural Symbolic Range Propagation for Optimizing CompilersHansang Bae, Rudolf Eigenmann. 413-424 [doi]
- Parallelization of Utility Programs Based on Behavior Phase AnalysisXipeng Shen, Chen Ding. 425-432 [doi]
- A Systematic Approach to Model-Guided Empirical Search for Memory Hierarchy OptimizationChun Chen, Jacqueline Chame, Mary W. Hall, Kristina Lerman. 433-440 [doi]
- An Efficient Approach for Self-scheduling Parallel Loops on Multiprogrammed Parallel ComputersArun Kejariwal, Alexandru Nicolau, Constantine D. Polychronopoulos. 441-449 [doi]
- Dynamic Compilation for Reducing Energy Consumption of I/O-Intensive ApplicationsSeung Woo Son, Guangyu Chen, Mahmut T. Kandemir, Alok N. Choudhary. 450-457 [doi]
- Supporting SELL for High-Performance ComputingBjarne Stroustrup, Gabriel Dos Reis. 458-465 [doi]
- Compiler Supports and Optimizations for PAC VLIW DSP ProcessorsYung-Chia Lin, Chung-Lin Tang, Chung-Ju Wu, Ming-Yu Hung, Yi-Ping You, Ya-Chiao Moo, Sheng-Yuan Chen, Jenq Kuen Lee. 466-474 [doi]