Generation of Control and Data Flow Graphs from Scheduled and Pipelined Assembly Code

David Zaretsky, Gaurav Mittal, Robert P. Dick, Prith Banerjee. Generation of Control and Data Flow Graphs from Scheduled and Pipelined Assembly Code. In Eduard Ayguadé, Gerald Baumgartner, J. Ramanujam, P. Sadayappan, editors, Languages and Compilers for Parallel Computing, 18th International Workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005, Revised Selected Papers. Volume 4339 of Lecture Notes in Computer Science, pages 76-90, Springer, 2005. [doi]

Abstract

Abstract is missing.