D. Ajitha - researchr alias

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Viewing Publication 1 - 4 from 4

2023

Correction to: Design and Implementation of Power-Efficient Cryptography Scheme Using a Novel Multiplication TechniqueB. Srikanth, J. V. R. Ravindra, P. Ramakrishna, D. Ajitha. wpc, 131(1):271, 2023. [doi]

Design and Implementation of Power-Efficient Cryptography Scheme Using a Novel Multiplication TechniqueB. Srikanth, J. V. R. Ravindra, P. Ramakrishna, D. Ajitha. wpc, 131(1):251-270, 2023. [doi]

2022

Intelligent Signal Gating-Aware Energy-Efficient 8-Bit FinFET Arithmetic and Logic UnitD. Ajitha, M. Chandra Sekhar Reddy. cssp, 41(1):299-320, 2022. [doi]

2021

Nanosheet field effect transistors-A next generation device to keep Moore's law alive: An intensive studyJ. Ajayan, D. Nirmal, Shubham Tayal, Sandip Bhattacharya, L. Arivazhagan, A. S. Augustine Fletcher, P. Murugapandiyan, D. Ajitha. mj, 114:105141, 2021. [doi]

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