Hsiu-Feng Lin - researchr alias

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Viewing Publication 1 - 4 from 4

2003

Built-in Test with Modified-Booth High-Speed Pipelined Multipliers and DividersHao-Yung Lo, Hsiu-Feng Lin, Chichyang Chen, Jenshiuh Liu, Chia-Cheng Liu. et, 19(3):245-269, 2003. [doi]

1996

Logarithmic Conversion by Four Partitioned Hybrid-ROMsHao-Yung Lo, Hsiu-Feng Lin, Yue-Yuan Ho. ispan 1996: 550-552 [doi]

1995

A New Method of Implementation of VLSI CORDIC for Sine and Cosine ComputationHao-Yung Lo, Hsiu-Feng Lin, Kuen-Shiuh Yang. iscas 1995: 1984-1987

1994

Hybrid ROM Strategy (H-ROM) for Conversion Between Binary Numbers and LogarithmsHao-Yung Lo, Hsiu-Feng Lin, Chiang-Shiang Wan. jise, 10(1):51-69, 1994. [doi]

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