M. C. Bhuvaneswari - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 6 from 6

2013

Simulation-based ATPG for low power testing of crosstalk delay faults in asynchronous circuitsS. Jayanthy, M. C. Bhuvaneswari, M. Prabhu. ijcat, 48(3):241-252, 2013. [doi]

2012

Test Generation for Crosstalk-Induced Delay Faults in VLSI Circuits Using Modified FAN AlgorithmS. Jayanthy, M. C. Bhuvaneswari, Keesarapalli Sujitha. vlsi, 2012, 2012. [doi]

A Novel Framework for Applying Multiobjective GA and PSO Based Approaches for Simultaneous Area, Delay, and Power Optimization in High Level Synthesis of DatapathsD. S. Harish Ram, M. C. Bhuvaneswari, Shanthi S. Prabhu. vlsi, 2012, 2012. [doi]

Task allocation in distributed computing systems using adaptive particle swarm optimisationG. Subashini, M. C. Bhuvaneswari. ijcat, 44(4):293-302, 2012. [doi]

2011

A Novel Evolutionary Technique for Multi-objective Power, Area and Delay Optimization in High Level Synthesis of DatapathsD. S. Harish Ram, M. C. Bhuvaneswari, S. M. Logesh. isvlsi 2011: 290-295 [doi]

2009

Efficient multi-objective genetic algorithm for hardware-software partitioning in embedded system design: ENGAM. Jagadeeswari, M. C. Bhuvaneswari. ijcat, 36(3/4):181-190, 2009. [doi]

Sign in or sign up to see more results.

runs on WebDSL