Manoj G. Dixit - researchr alias

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Viewing Publication 1 - 7 from 7

2014

Early Time-Budgeting for Component-Based Embedded Control SystemsManoj G. Dixit, S. Ramesh, Pallab Dasgupta. In Alberto L. Sangiovanni-Vincentelli, Haibo Zeng, Marco Di Natale, Peter Marwedel, editors, Embedded Systems Development, From Functional Models to Implementations. pages 123-137, Springer, 2014. [doi]

Time-budgeting: a component based development methodology for real-time embedded systemsManoj G. Dixit, S. Ramesh, Pallab Dasgupta. fac, 26(3):591-621, 2014. [doi]

2013

Scalable model-checking for precise end-to-end latency computationSwarup Mohalik, Devesh B. Chokshi, Manoj G. Dixit, A. C. Rajeev, S. Ramesh. cacsd 2013: 19-24 [doi]

2011

Some results on Parametric Temporal LogicManoj G. Dixit, S. Ramesh, Pallab Dasgupta. ipl, 111(20):994-998, 2011. [doi]

2010

Taming the component timing: A CBD methodology for real-time embedded systemsManoj G. Dixit, Pallab Dasgupta, S. Ramesh. date 2010: 1649-1652 [doi]

Schedulability and end-to-end latency in distributed ECU networks: formal modeling and precise estimationA. C. Rajeev, Swarup Mohalik, Manoj G. Dixit, Devesh B. Chokshi, S. Ramesh. emsoft 2010: 129-138 [doi]

2008

Model checking based analysis of end-to-end latency in embedded, real-time systems with clock driftsSwarup Mohalik, A. C. Rajeev, Manoj G. Dixit, S. Ramesh, P. Vijay Suman, Paritosh K. Pandya, Shengbing Jiang. dac 2008: 296-299 [doi]

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