Mostafa I. Soliman - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 29 from 29

2023

Lightweight Histological Tumor Classification Using a Joint Sparsity-Quantization Aware Training FrameworkDina Aboutahoun, Rami Zewail, Keiji Kimura, Mostafa I. Soliman. access, 11:119342-119351, 2023. [doi]

Cross-Domain Few-Shot Sparse-Quantization Aware Learning for Lymphoblast Detection in Blood Smear ImagesDina Aboutahoun, Rami Zewail, Keiji Kimura, Mostafa I. Soliman. acpr 2023: 213-226 [doi]

2022

Accelerating Data Dependence Profiling Through Abstract Interpretation of Loop InstructionsMostafa M. Abbas, Mostafa I. Soliman, Sherif I. Rabia, Keiji Kimura, Ahmed El-Mahdy 0002. access, 10:31626-31640, 2022. [doi]

On Potentials of Few-Shot Learning for AI-Enabled Internet of Medical ThingsDina Aboutahoun, Rami Zewail, Mostafa I. Soliman. globecom 2022: 1062-1067 [doi]

2015

Merging VLIW and vector processing techniques for a simple, high-performance processor architectureMostafa I. Soliman. mj, 46(7):637-655, 2015. [doi]

Simultaneous Multithreaded Matrix ProcessorMostafa I. Soliman, Elsayed A. Elsayed. jcsc, 24(8), 2015. [doi]

Simple super-matrix processor: Implementation and performance evaluationMostafa I. Soliman, Elsayed A. Elsayed. jpdc, 83:96-118, 2015. [doi]

2013

A shared matrix unit for a chip multi-core processorMostafa I. Soliman, Abdulmajid F. Al-Junaid. jpdc, 73(8):1146-1156, 2013. [doi]

Design, implementation, and evaluation of a low-complexity vector-core for executing scalar/vector instructionsMostafa I. Soliman. jpdc, 73(6):836-850, 2013. [doi]

2011

Mat-core: a decoupled matrix core extension for general-purpose processorsMostafa I. Soliman. npsc, 19(1-2):91-110, 2011. [doi]

FPGA implementation and performance evaluation of a high throughput crypto coprocessorMostafa I. Soliman, Ghada Y. Abozaid. jpdc, 71(8):1075-1084, 2011. [doi]

2010

Systemc Implementation and Performance Evaluation of a Decoupled General-Purpose Matrix ProcessorMostafa I. Soliman, Abdulmajid F. Al-Junaid. ppl, 20(2):103-121, 2010. [doi]

FastCrypto: parallel AES pipelines extension for general-purpose processorsMostafa I. Soliman, Ghada Y. Abozaid. npsc, 18(1):47-58, 2010. [doi]

Codevelopment of multi-level instruction set architecture and hardware for an efficient matrix processorMostafa I. Soliman, Abdulmajid F. Al-Junaid. npsc, 18(1):59-74, 2010. [doi]

2009

Performance Evaluation of Multi-Core Intel Xeon Processors on Basic Linear Algebra SubprogramsMostafa I. Soliman. ppl, 19(1):159-174, 2009. [doi]

Exploiting ILP, TLP, and DLP to Improve Multi-Core Performance of One-Sided Jacobi SVDMostafa I. Soliman. ppl, 19(2):355-375, 2009. [doi]

2008

Memory hierarchy exploration for accelerating the parallel computation of SVDsMostafa I. Soliman. npsc, 16(4):543-561, 2008. [doi]

A highly efficient implementation of a backpropagation learning algorithm using matrix ISAMostafa I. Soliman, Samir A. Mohamed. jpdc, 68(7):949-961, 2008. [doi]

2007

A highly efficient implementation of back propagation algorithm using matrix instruction set architectureMostafa I. Soliman, Samir A. Mohamed. npsc, 15(1):1-26, 2007. [doi]

A Block JRS Algorithm for Highly Parallel Computation of SVDsMostafa I. Soliman, Sanguthevar Rajasekaran, Reda A. Ammar. hpcc 2007: 346-357 [doi]

2005

A Matrix Processor for Math-intensive ApplicationsStanislav Sedukhin, Mostafa I. Soliman. caine 2005: 109-114

Performance Evaluation of Blas on the Trident ProcessorMostafa I. Soliman, Stanislav Sedukhin. ppl, 15(4):407-414, 2005. [doi]

2003

2002

A Multi-level ISA Processor for Accelerating Data Parallel ApplicationsMostafa I. Soliman, Stanislav Sedukhin. pdpta 2002: 1492-1498

Performance Analysis of SVD Algorithm on the Trident ProcessorMostafa I. Soliman, Stanislav Sedukhin. cw 2002: 95-104 [doi]

Sign in or sign up to see more results.

runs on WebDSL