P. Rangarajan - researchr alias

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Viewing Publication 1 - 12 from 12

2023

Retraction notice to "An optimized reconfigurable algorithm for FPGA architecture oriented IoT applications" [Cogn. Syst. Res. 52 (2018) 335-341]M. S. Kavitha, P. Rangarajan. cogsr, 82:101137, December 2023. [doi]

2021

Fuzzy Based Sleep Scheduling Algorithm with Machine Learning Techniques to Enhance Energy Efficiency in Wireless Sensor NetworksS. Radhika, P. Rangarajan. wpc, 118(4):3025-3044, 2021. [doi]

2020

An Efficient FPGA Architecture for Reconfigurable FFT Processor Incorporating an Integration of an Improved CORDIC and Radix-2 r AlgorithmM. S. Kavitha, P. Rangarajan. cssp, 39(11):5801-5829, 2020. [doi]

A machine learning application for reducing the security risks in hybrid cloud networksD. Praveena, P. Rangarajan. mta, 79(7-8):5161-5173, 2020. [doi]

A novel low-cost smart energy meter based on IoT for developing countries' micro gridsN. S. Srivatchan, P. Rangarajan. concurrency, 32(4), 2020. [doi]

2019

Intelligent computation techniques for optimization of the shortest path in an asynchronous network-on-chipK. Ilamathi, P. Rangarajan. cluster, 22(Suppl 1):335-346, 2019. [doi]

On improving the lifespan of wireless sensor networks with fuzzy based clustering and machine learning based data reductionS. Radhika, P. Rangarajan. asc, 83, 2019. [doi]

Novel effective X-path particle swarm optimization based deprived video data retrieval for smart cityS. Thanga Ramya, Bhuvaneshwari Arunagiri, P. Rangarajan. cluster, 22(6):13085-13094, 2019. [doi]

2018

Determining Effective Shortest Path in Asynchronous Network-on-Chip Through Bio-Inspired Optimization TechniquesK. Ilamathi, P. Rangarajan. wpc, 102(4):3375-3392, 2018. [doi]

An optimized reconfigurable algorithm for FPGA architecture oriented IoT applicationsM. S. Kavitha, P. Rangarajan. cogsr, 52:335-341, 2018. [doi]

2014

A Novel Substitution Box Design for humming Bird-2 against Side channel AttackT. Blesslin Sheeba, P. Rangarajan. jcsci, 10(9):1752-1757, 2014. [doi]

2004

A Parallel Architectural Implementation Of The New Three-Step Search Algorithm For Block Motion EstimationKavish Seth, P. Rangarajan, S. Srinivasan, V. Kamakoti, V. Bala Kuteshwar. vlsid 2004: 1071-1076 [doi]

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