Ramin Razmdideh - researchr alias

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Viewing Publication 1 - 5 from 5

2019

All-digital delay line-based time difference amplifier in 65 nm CMOS technologyRamin Razmdideh, Mohsen Saneei. iet-cds, 13(4):421-427, 2019. [doi]

2018

Low-power, latch-based multistage time-to-digital converter in 65 nm CMOS technologyRamin Razmdideh, Mohsen Saneei. ijcta, 46(6):1264-1271, 2018. [doi]

2015

New Design of Scan Flip-Flop to Increase Speed and Reduce Power ConsumptionRamin Razmdideh, Ali Mahani, Mohsen Saneei. jcsc, 24(10), 2015. [doi]

Two novel low power and very high speed pulse triggered flip-flopsRamin Razmdideh, Mohsen Saneei. ijcta, 43(12):1925-1934, 2015. [doi]

A novel low power and high speed double edge explicit pulse triggered level converter flip-flopRamin Razmdideh, Mohsen Saneei. ijcta, 43(4):516-523, 2015. [doi]

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