Robert J. Halstead - researchr alias

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Viewing Publication 1 - 8 from 8

2021

Efficient local locking for massively multithreaded in-memory hash-based operatorsBashar Romanous, Skyler Windh, Ildar Absalyamov, Prerna Budhkar, Robert J. Halstead, Walid A. Najjar, Vassilis J. Tsotras. vldb, 30(3):333-359, 2021. [doi]

2016

FPGA-accelerated group-by aggregation using synchronizing cachesIldar Absalyamov, Prerna Budhkar, Skyler Windh, Robert J. Halstead, Walid A. Najjar, Vassilis J. Tsotras. damon 2016: 11 [doi]

ROCCC 2.0Walid A. Najjar, Jason R. Villarreal, Robert J. Halstead. In Dirk Koch, Frank Hannig, Daniel Ziener, editors, FPGAs for Software Programmers. pages 191-204, Springer, 2016. [doi]

2015

Using Multithreaded Techniques to Mask Memory Latency on FPGA AcceleratorsRobert J. Halstead. PhD thesis, University of California, Riverside, USA, 2015. [doi]

FPGA-based Multithreading for In-Memory Hash JoinsRobert J. Halstead, Ildar Absalyamov, Walid A. Najjar, Vassilis J. Tsotras. cidr 2015: [doi]

High-Level Language Tools for Reconfigurable ComputingSkyler Windh, Xiaoyin Ma, Robert J. Halstead, Prerna Budhkar, Zabdiel Luna, Omar Hussaini, Walid A. Najjar. pieee, 103(3):390-408, 2015. [doi]

2014

Compiling irregular applications for reconfigurable systemsRobert J. Halstead, Jason R. Villarreal, Walid A. Najjar. ijhpcn, 7(4):258-268, 2014. [doi]

2011

Exploring irregular memory accesses on FPGAsRobert J. Halstead, Jason R. Villarreal, Walid A. Najjar. sc 2011: 31-34 [doi]

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