Yukio Akazawa - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 9 from 9

1998

A 156-Mb/s CMOS optical receiver for burst-mode transmissionMakoto Nakamura, Noboru Ishihara, Yukio Akazawa. jssc, 33(8):1179-1187, 1998. [doi]

1995

3.5-Gb/s/spl times/4-ch Si bipolar LSI's for optical interconnectionsNoboru Ishihara, Shuichi Fujita, Minoru Togashi, Shigeki Hino, Yoshimitsu Arai, Nobuyuki Tanaka, Yoshiji Kobayashi, Yukio Akazawa. jssc, 30(12):1493-1501, December 1995. [doi]

1994

A monolithic 156 Mb/s clock and data recovery PLL circuit using the sample-and-hold techniqueNoboru Ishihara, Yukio Akazawa. jssc, 29(12):1566-1571, December 1994. [doi]

A design technique for a 60 GHz-bandwidth distributed baseband amplifier IC moduleTsugumichi Shibata, Shunji Kimura, Hideaki Kimura 0002, Yuhki Imai, Yohtaro Umeda, Yukio Akazawa. jssc, 29(12):1537-1544, December 1994. [doi]

1993

Circuits to reduce distortion in the diode-bridge track-and-holdTsutomu Wakimoto, Yukio Akazawa. jssc, 28(3):384-387, March 1993. [doi]

1990

Jitter analysis of high-speed sampling systemsMitsuru Shinagawa, Yukio Akazawa, Tsutomu Wakimoto. jssc, 25(1):220-224, February 1990. [doi]

A low-power wide-band amplifier using a new parasitic capacitance compensation techniqueTsutomu Wakimoto, Yukio Akazawa. jssc, 25(1):200-206, February 1990. [doi]

1988

An 8-bit 2-ns monolithic DACTsutomu Kamoto, Yukio Akazawa, Mitsuru Shinagawa. jssc, 23(1):142-146, February 1988. [doi]

Si bipolar 2-GHz 6-bit flash A/D conversion LSITsutomu Wakimoto, Yukio Akazawa, Shinsuke Konaka. jssc, 23(6):1345-1350, December 1988. [doi]

Sign in or sign up to see more results.

runs on WebDSL